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[PULL 01/12] target/arm: Fix offsets for TTBCR
From: |
Peter Maydell |
Subject: |
[PULL 01/12] target/arm: Fix offsets for TTBCR |
Date: |
Sun, 18 Jul 2021 13:46:10 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
The functions vmsa_ttbcr_write and vmsa_ttbcr_raw_write expect
the offset to be for the complete TCR structure, not the offset
to the low 32-bits of a uint64_t. Using offsetoflow32 in this
case breaks big-endian hosts.
For TTBCR2, we do want the high 32-bits of a uint64_t.
Use cp15.tcr_el[*].raw_tcr as the offsetofhigh32 argument to
clarify this.
Buglink: https://gitlab.com/qemu-project/qemu/-/issues/187
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210709230621.938821-2-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/helper.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 910ace42741..0c07ca98376 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -4106,8 +4106,9 @@ static const ARMCPRegInfo vmsa_cp_reginfo[] = {
.access = PL1_RW, .accessfn = access_tvm_trvm,
.type = ARM_CP_ALIAS, .writefn = vmsa_ttbcr_write,
.raw_writefn = vmsa_ttbcr_raw_write,
- .bank_fieldoffsets = { offsetoflow32(CPUARMState, cp15.tcr_el[3]),
- offsetoflow32(CPUARMState, cp15.tcr_el[1])} },
+ /* No offsetoflow32 -- pass the entire TCR to writefn/raw_writefn. */
+ .bank_fieldoffsets = { offsetof(CPUARMState, cp15.tcr_el[3]),
+ offsetof(CPUARMState, cp15.tcr_el[1])} },
REGINFO_SENTINEL
};
@@ -4118,8 +4119,10 @@ static const ARMCPRegInfo ttbcr2_reginfo = {
.name = "TTBCR2", .cp = 15, .opc1 = 0, .crn = 2, .crm = 0, .opc2 = 3,
.access = PL1_RW, .accessfn = access_tvm_trvm,
.type = ARM_CP_ALIAS,
- .bank_fieldoffsets = { offsetofhigh32(CPUARMState, cp15.tcr_el[3]),
- offsetofhigh32(CPUARMState, cp15.tcr_el[1]) },
+ .bank_fieldoffsets = {
+ offsetofhigh32(CPUARMState, cp15.tcr_el[3].raw_tcr),
+ offsetofhigh32(CPUARMState, cp15.tcr_el[1].raw_tcr),
+ },
};
static void omap_ticonfig_write(CPUARMState *env, const ARMCPRegInfo *ri,
--
2.20.1
- [PULL 00/12] target-arm queue, Peter Maydell, 2021/07/18
- [PULL 01/12] target/arm: Fix offsets for TTBCR,
Peter Maydell <=
- [PULL 08/12] docs: Add QEMU version information to HTML footer, Peter Maydell, 2021/07/18
- [PULL 09/12] docs: Add skeletal documentation of cubieboard, Peter Maydell, 2021/07/18
- [PULL 04/12] docs: Remove "Contents:" lines from top-level subsections, Peter Maydell, 2021/07/18
- [PULL 02/12] docs: Fix documentation Copyright date, Peter Maydell, 2021/07/18
- [PULL 07/12] docs: Add license note to the HTML page footer, Peter Maydell, 2021/07/18
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- [PULL 12/12] target/arm: Remove duplicate 'plus1' function from Neon and SVE decode, Peter Maydell, 2021/07/18
- [PULL 05/12] docs: Move deprecation, build and license info out of system/, Peter Maydell, 2021/07/18