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[PATCH v3 09/13] target/mips: Reduce mips_tr_breakpoint_check pc advance
From: |
Richard Henderson |
Subject: |
[PATCH v3 09/13] target/mips: Reduce mips_tr_breakpoint_check pc advance to 2 |
Date: |
Sat, 17 Jul 2021 15:18:47 -0700 |
The actual number of bytes advanced need not be 100% exact,
but we should not cross a page when the insn would not.
If mips16 or mips32e are enabled, the minimum insn size is 2.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/mips/tcg/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index fd980ea966..ef00fbd2ac 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -16192,7 +16192,7 @@ static bool mips_tr_breakpoint_check(DisasContextBase
*dcbase, CPUState *cs,
* properly cleared -- thus we increment the PC here so that
* the logic setting tb->size below does the right thing.
*/
- ctx->base.pc_next += 4;
+ ctx->base.pc_next += 2;
return true;
}
--
2.25.1
- [PATCH v3 00/13] tcg: breakpoint reorg, Richard Henderson, 2021/07/17
- [PATCH v3 01/13] accel/tcg: Reduce CF_COUNT_MASK to match TCG_MAX_INSNS, Richard Henderson, 2021/07/17
- [PATCH v3 04/13] accel/tcg: Drop CF_NO_GOTO_PTR from -d nochain, Richard Henderson, 2021/07/17
- [PATCH v3 05/13] accel/tcg: Handle -singlestep in curr_cflags, Richard Henderson, 2021/07/17
- [PATCH v3 09/13] target/mips: Reduce mips_tr_breakpoint_check pc advance to 2,
Richard Henderson <=
- [PATCH v3 07/13] accel/tcg: Move cflags lookup into tb_find, Richard Henderson, 2021/07/17
- [PATCH v3 02/13] accel/tcg: Move curr_cflags into cpu-exec.c, Richard Henderson, 2021/07/17
- [PATCH v3 06/13] accel/tcg: Use CF_NO_GOTO_{TB, PTR} in cpu_exec_step_atomic, Richard Henderson, 2021/07/17
- [PATCH v3 08/13] target/avr: Advance pc in avr_tr_breakpoint_check, Richard Henderson, 2021/07/17