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[PATCH for-6.2 07/34] target/arm: Fix calculation of LTP mask when LR is
From: |
Peter Maydell |
Subject: |
[PATCH for-6.2 07/34] target/arm: Fix calculation of LTP mask when LR is 0 |
Date: |
Tue, 13 Jul 2021 14:36:59 +0100 |
In mve_element_mask(), we calculate a mask for tail predication which
should have a number of 1 bits based on the value of LR. However,
our MAKE_64BIT_MASK() macro has undefined behaviour when passed a
zero length. Special case this to give the all-zeroes mask we
require.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/mve_helper.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/arm/mve_helper.c b/target/arm/mve_helper.c
index f17e5a413fd..c75432c5fef 100644
--- a/target/arm/mve_helper.c
+++ b/target/arm/mve_helper.c
@@ -64,7 +64,8 @@ static uint16_t mve_element_mask(CPUARMState *env)
*/
int masklen = env->regs[14] << env->v7m.ltpsize;
assert(masklen <= 16);
- mask &= MAKE_64BIT_MASK(0, masklen);
+ uint16_t ltpmask = masklen ? MAKE_64BIT_MASK(0, masklen) : 0;
+ mask &= ltpmask;
}
if ((env->condexec_bits & 0xf) == 0) {
--
2.20.1
- [PATCH for-6.2 00/34] target/arm: Third slice of MVE implementation, Peter Maydell, 2021/07/13
- [PATCH for-6.2 02/34] target/arm: Print MVE VPR in CPU dumps, Peter Maydell, 2021/07/13
- [PATCH for-6.2 01/34] target/arm: Note that we handle VMOVL as a special case of VSHLL, Peter Maydell, 2021/07/13
- [PATCH for-6.2 04/34] target/arm: Fix signed VADDV, Peter Maydell, 2021/07/13
- [PATCH for-6.2 03/34] target/arm: Fix MVE VSLI by 0 and VSRI by <dt>, Peter Maydell, 2021/07/13
- [PATCH for-6.2 07/34] target/arm: Fix calculation of LTP mask when LR is 0,
Peter Maydell <=
- [PATCH for-6.2 08/34] target/arm: Fix VPT advance when ECI is non-zero, Peter Maydell, 2021/07/13
- [PATCH for-6.2 09/34] target/arm: Factor out mve_eci_mask(), Peter Maydell, 2021/07/13
- [PATCH for-6.2 12/34] target/arm: Implement MVE incrementing/decrementing dup insns, Peter Maydell, 2021/07/13