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Re: [PATCH v3 05/33] vl: Add sgx compound properties to expose SGX EPC s
From: |
Yang Zhong |
Subject: |
Re: [PATCH v3 05/33] vl: Add sgx compound properties to expose SGX EPC sections to guest |
Date: |
Mon, 12 Jul 2021 17:23:31 +0800 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
On Fri, Jul 09, 2021 at 06:07:13PM +0200, Paolo Bonzini wrote:
> On 09/07/21 13:09, Yang Zhong wrote:
> >+ sgx_epc = g_malloc0(sizeof(*sgx_epc));
> >+ pcms->sgx_epc = sgx_epc;
> >+
>
> No need to malloc this, it's small.
>
Thanks Paolo, i will use g_new0() to replace this malloc, thanks!
Yang
> > }
> >+##
> >+# @SgxEPC:
> >+#
> >+# Sgx EPC cmdline information
> >+#
> >+# @id: device's ID
> >+#
> >+# @memdev: memory backend linked with device
> >+#
> >+# Since: 6.1
> >+##
> >+{ 'struct': 'SgxEPC',
> >+ 'data': { 'id': [ 'str' ],
> >+ 'memdev': [ 'str' ]
> >+ }
> >+}
>
> Is the "id" needed at all? If not, you can make the property just a
> string list.
>
The current "id" is only shown in 'info memory-devices" command in the
monitor.
qemu) info memory-devices
Memory device [sgx-epc]: "epc1"
memaddr: 0x180000000
size: 29360128
memdev: /objects/mem1
Memory device [sgx-epc]: "epc2"
memaddr: 0x181c00000
size: 10485760
memdev: /objects/mem2
If this "id" is not MUST, i can remove this. thanks!
> If not, you should still make the property a list, and SgxEPC can be
> just the id/memdev pair.
>
The SGX EPC will support NUMA function,
-object memory-backend-ram,size=2G,host-nodes=0,policy=bind,id=node0 \
-object memory-backend-epc,id=mem0,size=100M \
-sgx-epc id=epc0,memdev=mem0,node=0 \
-numa node,nodeid=0,cpus=0-1,memdev=node0 \
Sorry this is older command style, i will change this to compound
property in the NUMA patchset.
So, the SgxEPC struct still needed even i removed 'id'.
> Also please place the compound property in PCMachineState, not in
> MachineState. You can call the field something else than sgx_epc to
> avoid conflicts with the SGXEPCState, for example sgx_epc_memdevs or
> sgx_epc_backends. Later it can be moved to X86MachineState if
> needed, but in any case it should not be in common
> target-independent code.
>
Yes, i will directly move compound property get/set from MachineState
to X86MachineState and change the sgx_epc to sgx_epc_backends to avoid
conflicts(In fact, i have done this and it works well). Thanks!
Yang
> Paolo
- [PATCH v3 00/33] Qemu SGX virtualization, Yang Zhong, 2021/07/09
- [PATCH v3 02/33] hostmem: Add hostmem-epc as a backend for SGX EPC, Yang Zhong, 2021/07/09
- [PATCH v3 03/33] qom: Add memory-backend-epc ObjectOptions support, Yang Zhong, 2021/07/09
- [PATCH v3 04/33] i386: Add 'sgx-epc' device to expose EPC sections to guest, Yang Zhong, 2021/07/09
- [PATCH v3 01/33] memory: Add RAM_PROTECTED flag to skip IOMMU mappings, Yang Zhong, 2021/07/09
- [PATCH v3 05/33] vl: Add sgx compound properties to expose SGX EPC sections to guest, Yang Zhong, 2021/07/09
- [PATCH v3 06/33] i386: Add primary SGX CPUID and MSR defines, Yang Zhong, 2021/07/09
- [PATCH v3 07/33] i386: Add SGX CPUID leaf FEAT_SGX_12_0_EAX, Yang Zhong, 2021/07/09
- [PATCH v3 08/33] i386: Add SGX CPUID leaf FEAT_SGX_12_0_EBX, Yang Zhong, 2021/07/09
- [PATCH v3 09/33] i386: Add SGX CPUID leaf FEAT_SGX_12_1_EAX, Yang Zhong, 2021/07/09
- [PATCH v3 10/33] i386: Add get/set/migrate support for SGX_LEPUBKEYHASH MSRs, Yang Zhong, 2021/07/09
- [PATCH v3 11/33] i386: Add feature control MSR dependency when SGX is enabled, Yang Zhong, 2021/07/09
- [PATCH v3 12/33] i386: Update SGX CPUID info according to hardware/KVM/user input, Yang Zhong, 2021/07/09
- [PATCH v3 14/33] i386: Propagate SGX CPUID sub-leafs to KVM, Yang Zhong, 2021/07/09
- [PATCH v3 13/33] i386: kvm: Add support for exposing PROVISIONKEY to guest, Yang Zhong, 2021/07/09
- [PATCH v3 15/33] Adjust min CPUID level to 0x12 when SGX is enabled, Yang Zhong, 2021/07/09