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[RFC PATCH v2 42/44] hw/i386: add a flag to disable init/sipi delivery m
From: |
isaku . yamahata |
Subject: |
[RFC PATCH v2 42/44] hw/i386: add a flag to disable init/sipi delivery mode of interrupt |
Date: |
Wed, 7 Jul 2021 17:55:12 -0700 |
From: Isaku Yamahata <isaku.yamahata@intel.com>
Add a new flag to X86Machine to disallow INIT/SIPI delivery mode of
interrupt and pass it to ioapic creation so that ioapic disallows INIT/SIPI
delivery mode.
Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com>
---
hw/i386/microvm.c | 4 ++--
hw/i386/pc_piix.c | 2 +-
hw/i386/pc_q35.c | 2 +-
hw/i386/x86.c | 11 +++++++++--
include/hw/i386/x86.h | 7 +++++--
5 files changed, 18 insertions(+), 8 deletions(-)
diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c
index 7504324891..c790adecfb 100644
--- a/hw/i386/microvm.c
+++ b/hw/i386/microvm.c
@@ -176,11 +176,11 @@ static void microvm_devices_init(MicrovmMachineState *mms)
isa_bus_irqs(isa_bus, x86ms->gsi);
ioapic_init_gsi(gsi_state, "machine", x86ms->eoi_intercept_unsupported,
- x86ms->smi_unsupported);
+ x86ms->smi_unsupported, x86ms->init_sipi_unsupported);
if (ioapics > 1) {
x86ms->ioapic2 = ioapic_init_secondary(
gsi_state, x86ms->eoi_intercept_unsupported,
- x86ms->smi_unsupported);
+ x86ms->smi_unsupported, x86ms->init_sipi_unsupported);
}
kvmclock_create(true);
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 0958035bf8..940cd0f47b 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -224,7 +224,7 @@ static void pc_init1(MachineState *machine,
if (pcmc->pci_enabled) {
ioapic_init_gsi(gsi_state, "i440fx", x86ms->eoi_intercept_unsupported,
- x86ms->smi_unsupported);
+ x86ms->smi_unsupported, x86ms->init_sipi_unsupported);
}
if (tcg_enabled()) {
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 1ab8a6a78b..8f677ec136 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -257,7 +257,7 @@ static void pc_q35_init(MachineState *machine)
if (pcmc->pci_enabled) {
ioapic_init_gsi(gsi_state, "q35", x86ms->eoi_intercept_unsupported,
- x86ms->smi_unsupported);
+ x86ms->smi_unsupported, x86ms->init_sipi_unsupported);
}
if (tcg_enabled()) {
diff --git a/hw/i386/x86.c b/hw/i386/x86.c
index 3dc36e3590..24af05c313 100644
--- a/hw/i386/x86.c
+++ b/hw/i386/x86.c
@@ -610,7 +610,8 @@ void gsi_handler(void *opaque, int n, int level)
void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name,
bool level_trigger_unsupported,
- bool smi_unsupported)
+ bool smi_unsupported,
+ bool init_sipi_unsupported)
{
DeviceState *dev;
SysBusDevice *d;
@@ -628,6 +629,8 @@ void ioapic_init_gsi(GSIState *gsi_state, const char
*parent_name,
level_trigger_unsupported, NULL);
object_property_set_bool(OBJECT(dev), "smi_unsupported",
smi_unsupported, NULL);
+ object_property_set_bool(OBJECT(dev), "init_sipi_unsupported",
+ init_sipi_unsupported, NULL);
d = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(d, &error_fatal);
sysbus_mmio_map(d, 0, IO_APIC_DEFAULT_ADDRESS);
@@ -639,7 +642,8 @@ void ioapic_init_gsi(GSIState *gsi_state, const char
*parent_name,
DeviceState *ioapic_init_secondary(GSIState *gsi_state,
bool level_trigger_unsupported,
- bool smi_unsupported)
+ bool smi_unsupported,
+ bool init_sipi_unsupported)
{
DeviceState *dev;
SysBusDevice *d;
@@ -650,6 +654,8 @@ DeviceState *ioapic_init_secondary(GSIState *gsi_state,
level_trigger_unsupported, NULL);
object_property_set_bool(OBJECT(dev), "smi_unsupported",
smi_unsupported, NULL);
+ object_property_set_bool(OBJECT(dev), "init_sipi_unsupported",
+ init_sipi_unsupported, NULL);
d = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(d, &error_fatal);
sysbus_mmio_map(d, 0, IO_APIC_SECONDARY_ADDRESS);
@@ -1325,6 +1331,7 @@ static void x86_machine_initfn(Object *obj)
x86ms->bus_lock_ratelimit = 0;
x86ms->eoi_intercept_unsupported = false;
x86ms->smi_unsupported = false;
+ x86ms->init_sipi_unsupported = false;
object_property_add_str(obj, "kvm-type",
x86_get_kvm_type, x86_set_kvm_type);
diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h
index 3d1d74d171..bca8c2b57d 100644
--- a/include/hw/i386/x86.h
+++ b/include/hw/i386/x86.h
@@ -65,6 +65,7 @@ struct X86MachineState {
uint16_t boot_cpus;
bool eoi_intercept_unsupported;
bool smi_unsupported;
+ bool init_sipi_unsupported;
OnOffAuto smm;
OnOffAuto acpi;
@@ -143,9 +144,11 @@ qemu_irq x86_allocate_cpu_irq(void);
void gsi_handler(void *opaque, int n, int level);
void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name,
bool eoi_intercept_unsupported,
- bool smi_unsupported);
+ bool smi_unsupported,
+ bool init_sipi_unsupported);
DeviceState *ioapic_init_secondary(GSIState *gsi_state,
bool eoi_intercept_unsupported,
- bool smi_unsupported);
+ bool smi_unsupported,
+ bool init_sipi_unsupported);
#endif
--
2.25.1
- [RFC PATCH v2 19/44] hw/i386/e820: introduce a helper function to change type of e820, (continued)
- [RFC PATCH v2 19/44] hw/i386/e820: introduce a helper function to change type of e820, isaku . yamahata, 2021/07/07
- [RFC PATCH v2 41/44] ioapic: add property to disallow INIT/SIPI delivery mode, isaku . yamahata, 2021/07/07
- [RFC PATCH v2 20/44] i386/tdx: Parse tdx metadata and store the result into TdxGuestState, isaku . yamahata, 2021/07/07
- [RFC PATCH v2 22/44] i386/tdx: Add TDVF memory via INIT_MEM_REGION, isaku . yamahata, 2021/07/07
- [RFC PATCH v2 21/44] i386/tdx: Create the TD HOB list upon machine init done, isaku . yamahata, 2021/07/07
- [RFC PATCH v2 40/44] hw/i386: add a flag to disallow SMI, isaku . yamahata, 2021/07/07
- [RFC PATCH v2 43/44] i386/tdx: disallow level interrupt and SMI/INIT/SIPI delivery mode, isaku . yamahata, 2021/07/07
- [RFC PATCH v2 44/44] i386/tdx: disable S3/S4 unconditionally, isaku . yamahata, 2021/07/07
- [RFC PATCH v2 25/44] q35: Move PCIe BAR check above PAM check in mch_write_config(), isaku . yamahata, 2021/07/07
- [RFC PATCH v2 24/44] i386/tdx: Add MMIO HOB entries, isaku . yamahata, 2021/07/07
- [RFC PATCH v2 42/44] hw/i386: add a flag to disable init/sipi delivery mode of interrupt,
isaku . yamahata <=
- [RFC PATCH v2 23/44] i386/tdx: Use KVM_TDX_INIT_VCPU to pass HOB to TDVF, isaku . yamahata, 2021/07/07
- [RFC PATCH v2 27/44] q35: Introduce smm_ranges property for q35-pci-host, isaku . yamahata, 2021/07/07
- [RFC PATCH v2 28/44] i386/tdx: Force x2apic mode and routing for TDs, isaku . yamahata, 2021/07/07
- [RFC PATCH v2 26/44] pci-host/q35: Move PAM initialization above SMRAM initialization, isaku . yamahata, 2021/07/07