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[PATCH 11/20] Hexagon HVX (target/hexagon) instruction utility functions
From: |
Taylor Simpson |
Subject: |
[PATCH 11/20] Hexagon HVX (target/hexagon) instruction utility functions |
Date: |
Mon, 5 Jul 2021 18:34:25 -0500 |
Functions to support scatter/gather
Add new file to target/hexagon/meson.build
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
---
target/hexagon/arch.h | 1 +
target/hexagon/mmvec/system_ext_mmvec.h | 35 ++++++++++
target/hexagon/arch.c | 9 +++
target/hexagon/mmvec/system_ext_mmvec.c | 119 ++++++++++++++++++++++++++++++++
target/hexagon/meson.build | 1 +
5 files changed, 165 insertions(+)
create mode 100644 target/hexagon/mmvec/system_ext_mmvec.h
create mode 100644 target/hexagon/mmvec/system_ext_mmvec.c
diff --git a/target/hexagon/arch.h b/target/hexagon/arch.h
index 7091806..133cb6d 100644
--- a/target/hexagon/arch.h
+++ b/target/hexagon/arch.h
@@ -24,6 +24,7 @@ extern const uint8_t rLPS_table_64x4[64][4];
extern const uint8_t AC_next_state_MPS_64[64];
extern const uint8_t AC_next_state_LPS_64[64];
+uint32_t count_leading_ones_2(uint16_t src);
uint64_t interleave(uint32_t odd, uint32_t even);
uint64_t deinterleave(uint64_t src);
int32_t conv_round(int32_t a, int n);
diff --git a/target/hexagon/mmvec/system_ext_mmvec.h
b/target/hexagon/mmvec/system_ext_mmvec.h
new file mode 100644
index 0000000..d103191
--- /dev/null
+++ b/target/hexagon/mmvec/system_ext_mmvec.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights
Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef HEXAGON_SYSTEM_EXT_MMVEC_H
+#define HEXAGON_SYSTEM_EXT_MMVEC_H
+
+void mem_load_vector(CPUHexagonState *env, target_ulong vaddr,
+ int size, uint8_t *data);
+void mem_gather_store(CPUHexagonState *env, target_ulong vaddr,
+ int slot, uint8_t *data);
+void mem_store_vector(CPUHexagonState *env, target_ulong vaddr,
+ int slot, int size,
+ uint8_t *data, uint8_t *mask, bool invert);
+void mem_vector_scatter_init(CPUHexagonState *env, int slot,
+ target_ulong base_vaddr, int length,
+ int element_size);
+void mem_vector_gather_init(CPUHexagonState *env, int slot,
+ target_ulong base_vaddr, int length,
+ int element_size);
+
+#endif
diff --git a/target/hexagon/arch.c b/target/hexagon/arch.c
index 68a55b3..b2ff905 100644
--- a/target/hexagon/arch.c
+++ b/target/hexagon/arch.c
@@ -118,6 +118,15 @@ const uint8_t AC_next_state_LPS_64[64] = {
37, 38, 38, 63
};
+uint32_t count_leading_ones_2(uint16_t src)
+{
+ int ret;
+ for (ret = 0; src & 0x8000; src <<= 1) {
+ ret++;
+ }
+ return ret;
+}
+
#define BITS_MASK_8 0x5555555555555555ULL
#define PAIR_MASK_8 0x3333333333333333ULL
#define NYBL_MASK_8 0x0f0f0f0f0f0f0f0fULL
diff --git a/target/hexagon/mmvec/system_ext_mmvec.c
b/target/hexagon/mmvec/system_ext_mmvec.c
new file mode 100644
index 0000000..fbd7505
--- /dev/null
+++ b/target/hexagon/mmvec/system_ext_mmvec.c
@@ -0,0 +1,119 @@
+/*
+ * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights
Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "qemu/osdep.h"
+#include "qemu.h"
+#include "cpu.h"
+#include "mmvec/system_ext_mmvec.h"
+
+void mem_gather_store(CPUHexagonState *env, target_ulong vaddr,
+ int slot, uint8_t *data)
+{
+ size_t size = sizeof(MMVector);
+
+ /*
+ * If it's a gather store update store data from temporary register
+ * and clear flag
+ */
+ memcpy(data, &env->tmp_VRegs[0].ub[0], size);
+ env->VRegs_updated_tmp = 0;
+ env->gather_issued = false;
+
+ env->vstore_pending[slot] = 1;
+ env->vstore[slot].va = vaddr;
+ env->vstore[slot].size = size;
+ memcpy(&env->vstore[slot].data.ub[0], data, size);
+
+ /* On a gather store, overwrite the store mask to emulate dropped gathers
*/
+ memcpy(&env->vstore[slot].mask.ub[0], &env->vtcm_log.mask.ub[0], size);
+}
+
+void mem_store_vector(CPUHexagonState *env, target_ulong vaddr, int slot,
+ int size, uint8_t *data, uint8_t *mask, bool invert)
+{
+ if (!size) {
+ return;
+ }
+
+ if (env->is_gather_store_insn) {
+ mem_gather_store(env, vaddr, slot, data);
+ return;
+ }
+
+ env->vstore_pending[slot] = 1;
+ env->vstore[slot].va = vaddr;
+ env->vstore[slot].size = size;
+ memcpy(&env->vstore[slot].data.ub[0], data, size);
+ if (!mask) {
+ memset(&env->vstore[slot].mask.ub[0], invert ? 0 : -1, size);
+ } else if (invert) {
+ for (int i = 0; i < size; i++) {
+ env->vstore[slot].mask.ub[i] = !mask[i];
+ }
+ } else {
+ memcpy(&env->vstore[slot].mask.ub[0], mask, size);
+ }
+}
+
+void mem_load_vector(CPUHexagonState *env, target_ulong vaddr,
+ int size, uint8_t *data)
+{
+ for (int i = 0; i < size; i++) {
+ get_user_u8(data[i], vaddr);
+ vaddr++;
+ }
+}
+
+void mem_vector_scatter_init(CPUHexagonState *env, int slot,
+ target_ulong base_vaddr,
+ int length, int element_size)
+{
+ int i;
+
+ for (i = 0; i < sizeof(MMVector); i++) {
+ env->vtcm_log.data.ub[i] = 0;
+ env->vtcm_log.mask.ub[i] = 0;
+ }
+
+ env->vtcm_pending = true;
+ env->vtcm_log.op = false;
+ env->vtcm_log.op_size = 0;
+ env->vtcm_log.size = sizeof(MMVector);
+}
+
+void mem_vector_gather_init(CPUHexagonState *env, int slot,
+ target_ulong base_vaddr,
+ int length, int element_size)
+{
+ int i;
+
+ for (i = 0; i < sizeof(MMVector); i++) {
+ env->vtcm_log.data.ub[i] = 0;
+ env->vtcm_log.mask.ub[i] = 0;
+ env->vtcm_log.va[i] = 0;
+ env->tmp_VRegs[0].ub[i] = 0;
+ }
+ env->vtcm_log.op = false;
+ env->vtcm_log.op_size = 0;
+
+ /*
+ * Temp reg gets updated
+ * This allows store .new to grab the correct result
+ */
+ env->VRegs_updated_tmp = 1;
+ env->gather_issued = true;
+}
diff --git a/target/hexagon/meson.build b/target/hexagon/meson.build
index 6fd9360..ed292b4 100644
--- a/target/hexagon/meson.build
+++ b/target/hexagon/meson.build
@@ -173,6 +173,7 @@ hexagon_ss.add(files(
'printinsn.c',
'arch.c',
'fma_emu.c',
+ 'mmvec/system_ext_mmvec.c',
))
target_arch += {'hexagon': hexagon_ss}
--
2.7.4
- [PATCH 02/20] Hexagon HVX (target/hexagon) add Hexagon Vector eXtensions (HVX) to core, (continued)
- [PATCH 16/20] Hexagon HVX (target/hexagon) import instruction encodings, Taylor Simpson, 2021/07/05
- [PATCH 05/20] Hexagon HVX (target/hexagon) instruction attributes, Taylor Simpson, 2021/07/05
- [PATCH 03/20] Hexagon HVX (target/hexagon) register names, Taylor Simpson, 2021/07/05
- [PATCH 10/20] Hexagon HVX (target/hexagon) C preprocessor for decode tree, Taylor Simpson, 2021/07/05
- [PATCH 11/20] Hexagon HVX (target/hexagon) instruction utility functions,
Taylor Simpson <=
- [PATCH 20/20] Hexagon HVX (tests/tcg/hexagon) histogram test, Taylor Simpson, 2021/07/05
- [PATCH 19/20] Hexagon HVX (tests/tcg/hexagon) scatter_gather test, Taylor Simpson, 2021/07/05
- [PATCH 15/20] Hexagon HVX (target/hexagon) instruction decoding, Taylor Simpson, 2021/07/05
- [PATCH 13/20] Hexagon HVX (target/hexagon) TCG generation, Taylor Simpson, 2021/07/05
- [PATCH 18/20] Hexagon HVX (tests/tcg/hexagon) hvx_misc test, Taylor Simpson, 2021/07/05
- [PATCH 17/20] Hexagon HVX (tests/tcg/hexagon) vector_add_int test, Taylor Simpson, 2021/07/05
- [PATCH 14/20] Hexagon HVX (target/hexagon) import semantics, Taylor Simpson, 2021/07/05