Re: [PATCH 1/2] docs/system: riscv: Fix CLINT name in the sifive_u doc

[Alistair Francis]

On Mon, Jun 28, 2021 at 12:28 AM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> It's Core *Local* Interruptor, not 'Level'.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>
>  docs/system/riscv/sifive_u.rst | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/docs/system/riscv/sifive_u.rst b/docs/system/riscv/sifive_u.rst
> index 32d0a1b85d..01108b5ecc 100644
> --- a/docs/system/riscv/sifive_u.rst
> +++ b/docs/system/riscv/sifive_u.rst
> @@ -11,7 +11,7 @@ The ``sifive_u`` machine supports the following devices:
>
>  * 1 E51 / E31 core
>  * Up to 4 U54 / U34 cores
> -* Core Level Interruptor (CLINT)
> +* Core Local Interruptor (CLINT)
>  * Platform-Level Interrupt Controller (PLIC)
>  * Power, Reset, Clock, Interrupt (PRCI)
>  * L2 Loosely Integrated Memory (L2-LIM)
> --
> 2.25.1
>
>