[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 04/15] target/mips: Raise exception when DINSV opcode used with DS
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 04/15] target/mips: Raise exception when DINSV opcode used with DSP disabled |
Date: |
Fri, 25 Jun 2021 11:23:18 +0200 |
Per the "MIPS® DSP Module for MIPS64 Architecture" manual, rev. 3.02,
Table 5.3 "SPECIAL3 Encoding of Function Field for DSP Module":
If the Module/ASE is not implemented, executing such an instruction
must cause a Reserved Instruction Exception.
The DINSV instruction lists the following exceptions:
- Reserved Instruction
- DSP Disabled
If the MIPS core doesn't support the DSP module, or the DSP is
disabled, do not handle the '$rt = $0' case as a no-op but raise
the proper exception instead.
Cc: Jia Liu <proljc@gmail.com>
Fixes: 1cb6686cf92 ("target-mips: Add ASE DSP bit/manipulation instructions")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210529165443.1114402-1-f4bug@amsat.org>
---
target/mips/tcg/translate.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index 09b19262c8c..3fd0c48d772 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -24379,10 +24379,11 @@ static void decode_opc_special3_legacy(CPUMIPSState
*env, DisasContext *ctx)
{
TCGv t0, t1;
+ check_dsp(ctx);
+
if (rt == 0) {
break;
}
- check_dsp(ctx);
t0 = tcg_temp_new();
t1 = tcg_temp_new();
--
2.31.1
- [PULL 00/15] MIPS patches for 2021-06-25, Philippe Mathieu-Daudé, 2021/06/25
- [PULL 01/15] target/mips: Fix potential integer overflow (CID 1452921), Philippe Mathieu-Daudé, 2021/06/25
- [PULL 02/15] target/mips: Fix TCG temporary leaks in gen_pool32a5_nanomips_insn(), Philippe Mathieu-Daudé, 2021/06/25
- [PULL 03/15] target/mips: Fix more TCG temporary leaks in gen_pool32a5_nanomips_insn, Philippe Mathieu-Daudé, 2021/06/25
- [PULL 04/15] target/mips: Raise exception when DINSV opcode used with DSP disabled,
Philippe Mathieu-Daudé <=
- [PULL 05/15] target/mips: Do not abort on invalid instruction, Philippe Mathieu-Daudé, 2021/06/25
- [PULL 06/15] target/mips: Move TCG trace events to tcg/ sub directory, Philippe Mathieu-Daudé, 2021/06/25
- [PULL 07/15] target/mips: Move translate.h to tcg/ sub directory, Philippe Mathieu-Daudé, 2021/06/25
- [PULL 08/15] target/mips: Restrict some system specific declarations to sysemu, Philippe Mathieu-Daudé, 2021/06/25
- [PULL 09/15] target/mips: Remove SmartMIPS / MDMX unuseful comments, Philippe Mathieu-Daudé, 2021/06/25
- [PULL 10/15] target/mips: Remove microMIPS BPOSGE32 / BPOSGE64 unuseful cases, Philippe Mathieu-Daudé, 2021/06/25
- [PULL 11/15] target/mips: fix emulation of nanoMIPS BPOSGE32 instruction, Philippe Mathieu-Daudé, 2021/06/25
- [PULL 12/15] target/mips: Constify host_to_mips_errno[], Philippe Mathieu-Daudé, 2021/06/25
- [PULL 13/15] target/mips: Optimize regnames[] arrays, Philippe Mathieu-Daudé, 2021/06/25
- [PULL 14/15] target/mips: Remove pointless gen_msa(), Philippe Mathieu-Daudé, 2021/06/25