[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: Guidance on emulating "sparse" address spaces
From: |
Jason Thorpe |
Subject: |
Re: Guidance on emulating "sparse" address spaces |
Date: |
Wed, 23 Jun 2021 17:53:15 -0700 |
> On Jun 23, 2021, at 5:42 PM, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
>> I'm trying to wrap my head around how to achieve this in Qemu. I don't see
>> an obvious way from my initial study of how the PCI code and memory regions
>> work. Some guidance would be appreciated!
>
> Is bitband_ops[] useful? (see hw/arm/armv7m.c)
Thanks for the pointer! Yes, it seems like that might be similar to what I
need... create new address spaces (rather than using the "system" address
space) for the PCI memory and I/O regions (I need to do this for PCI
configuration space, too, FWIW...), then in my sparse ops handlers, decode the
bus address and size, and then call address_space_{read,write}(). Have I got
the gist of it?
-- thorpej