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Re: [PATCH 21/28] target/arm: Improve vector REV
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From: |
Peter Maydell |
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Subject: |
Re: [PATCH 21/28] target/arm: Improve vector REV |
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Date: |
Mon, 21 Jun 2021 16:10:06 +0100 |
On Mon, 14 Jun 2021 at 09:38, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> We can eliminate the requirement for a zero-extended output,
> because the following store will ignore any garbage high bits.
>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
thanks
-- PMM
- Re: [PATCH 20/28] target/arm: Improve REV32, (continued)
- [PATCH 19/28] tcg: Make use of bswap flags in tcg_gen_qemu_st_*, Richard Henderson, 2021/06/14
- [PATCH 25/28] target/mips: Fix gen_mxu_s32ldd_s32lddr, Richard Henderson, 2021/06/14
- [PATCH 27/28] tcg/aarch64: Unset TCG_TARGET_HAS_MEMORY_BSWAP, Richard Henderson, 2021/06/14
- [PATCH 12/28] tcg/s390: Support bswap flags, Richard Henderson, 2021/06/14
- [PATCH 21/28] target/arm: Improve vector REV, Richard Henderson, 2021/06/14
- [PATCH 23/28] target/i386: Improve bswap translation, Richard Henderson, 2021/06/14
- [PATCH 24/28] target/sh4: Improve swap.b translation, Richard Henderson, 2021/06/14
- [PATCH 22/28] target/arm: Improve REVSH, Richard Henderson, 2021/06/14
- [PATCH 28/28] tcg/riscv: Remove MO_BSWAP handling, Richard Henderson, 2021/06/14