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[PULL 33/37] linux-user/s390x: Save and restore psw.mask properly
From: |
Cornelia Huck |
Subject: |
[PULL 33/37] linux-user/s390x: Save and restore psw.mask properly |
Date: |
Mon, 21 Jun 2021 11:58:38 +0200 |
From: Richard Henderson <richard.henderson@linaro.org>
At present, we're referencing env->psw.mask directly, which
fails to ensure that env->cc_op is incorporated or updated.
Use s390_cpu_{set_psw,get_psw_mask} to fix this.
Mirror the kernel's cleaning of the psw.mask in save_sigregs
and restore_sigregs. Ignore PSW_MASK_RI for now, as qemu does
not support that.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Tested-by: jonathan.albrecht <jonathan.albrecht@linux.vnet.ibm.com>
Tested-by: <ruixin.bao@ibm.com>
Message-Id: <20210615030744.1252385-6-richard.henderson@linaro.org>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
---
linux-user/s390x/signal.c | 37 ++++++++++++++++++++++++++++++++-----
1 file changed, 32 insertions(+), 5 deletions(-)
diff --git a/linux-user/s390x/signal.c b/linux-user/s390x/signal.c
index ef136dae3348..bf8a8fbfe9fc 100644
--- a/linux-user/s390x/signal.c
+++ b/linux-user/s390x/signal.c
@@ -112,15 +112,23 @@ get_sigframe(struct target_sigaction *ka, CPUS390XState
*env, size_t frame_size)
return (sp - frame_size) & -8ul;
}
+#define PSW_USER_BITS (PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | \
+ PSW_MASK_MCHECK | PSW_MASK_PSTATE | PSW_ASC_PRIMARY)
+#define PSW_MASK_USER (PSW_MASK_ASC | PSW_MASK_CC | PSW_MASK_PM | \
+ PSW_MASK_64 | PSW_MASK_32)
+
static void save_sigregs(CPUS390XState *env, target_sigregs *sregs)
{
+ uint64_t psw_mask = s390_cpu_get_psw_mask(env);
int i;
/*
* Copy a 'clean' PSW mask to the user to avoid leaking
* information about whether PER is currently on.
+ * TODO: qemu does not support PSW_MASK_RI; it will never be set.
*/
- __put_user(env->psw.mask, &sregs->regs.psw.mask);
+ psw_mask = PSW_USER_BITS | (psw_mask & PSW_MASK_USER);
+ __put_user(psw_mask, &sregs->regs.psw.mask);
__put_user(env->psw.addr, &sregs->regs.psw.addr);
for (i = 0; i < 16; i++) {
@@ -289,7 +297,7 @@ void setup_rt_frame(int sig, struct target_sigaction *ka,
static void restore_sigregs(CPUS390XState *env, target_sigregs *sc)
{
- target_ulong prev_addr;
+ uint64_t prev_addr, prev_mask, mask, addr;
int i;
for (i = 0; i < 16; i++) {
@@ -297,9 +305,28 @@ static void restore_sigregs(CPUS390XState *env,
target_sigregs *sc)
}
prev_addr = env->psw.addr;
- __get_user(env->psw.mask, &sc->regs.psw.mask);
- __get_user(env->psw.addr, &sc->regs.psw.addr);
- trace_user_s390x_restore_sigregs(env, env->psw.addr, prev_addr);
+ __get_user(mask, &sc->regs.psw.mask);
+ __get_user(addr, &sc->regs.psw.addr);
+ trace_user_s390x_restore_sigregs(env, addr, prev_addr);
+
+ /*
+ * Use current psw.mask to preserve PER bit.
+ * TODO:
+ * if (!is_ri_task(current) && (user_sregs.regs.psw.mask & PSW_MASK_RI))
+ * return -EINVAL;
+ * Simply do not allow it to be set in mask.
+ */
+ prev_mask = s390_cpu_get_psw_mask(env);
+ mask = (prev_mask & ~PSW_MASK_USER) | (mask & PSW_MASK_USER);
+ /* Check for invalid user address space control. */
+ if ((mask & PSW_MASK_ASC) == PSW_ASC_HOME) {
+ mask = (mask & ~PSW_MASK_ASC) | PSW_ASC_PRIMARY;
+ }
+ /* Check for invalid amode. */
+ if (mask & PSW_MASK_64) {
+ mask |= PSW_MASK_32;
+ }
+ s390_cpu_set_psw(env, mask, addr);
for (i = 0; i < 16; i++) {
__get_user(env->aregs[i], &sc->regs.acrs[i]);
--
2.31.1
- [PULL 22/37] s390x/tcg: Implement 32/128 bit for VECTOR FP MULTIPLY AND (ADD|SUBTRACT), (continued)
- [PULL 22/37] s390x/tcg: Implement 32/128 bit for VECTOR FP MULTIPLY AND (ADD|SUBTRACT), Cornelia Huck, 2021/06/21
- [PULL 25/37] linux-user: elf: s390x: Prepare for Vector enhancements facility, Cornelia Huck, 2021/06/21
- [PULL 27/37] s390x/cpumodel: Bump up QEMU model to a stripped-down IBM z14 GA2, Cornelia Huck, 2021/06/21
- [PULL 26/37] s390x/tcg: We support Vector enhancements facility, Cornelia Huck, 2021/06/21
- [PULL 28/37] configure: Check whether we can compile the s390-ccw bios with -msoft-float, Cornelia Huck, 2021/06/21
- [PULL 29/37] target/s390x: Expose load_psw and get_psw_mask to cpu.h, Cornelia Huck, 2021/06/21
- [PULL 30/37] target/s390x: Do not modify cpu state in s390_cpu_get_psw_mask, Cornelia Huck, 2021/06/21
- [PULL 31/37] target/s390x: Improve s390_cpu_dump_state vs cc_op, Cornelia Huck, 2021/06/21
- [PULL 32/37] target/s390x: Use s390_cpu_{set_psw, get_psw_mask} in gdbstub, Cornelia Huck, 2021/06/21
- [PULL 35/37] s390x/css: Split out the IRB sense data, Cornelia Huck, 2021/06/21
- [PULL 33/37] linux-user/s390x: Save and restore psw.mask properly,
Cornelia Huck <=
- [PULL 34/37] s390x/css: Introduce an ESW struct, Cornelia Huck, 2021/06/21
- [PULL 36/37] s390x/css: Refactor IRB construction, Cornelia Huck, 2021/06/21
- [PULL 37/37] s390x/css: Add passthrough IRB, Cornelia Huck, 2021/06/21
- Re: [PULL 00/37] s390x update, no-reply, 2021/06/21
- Re: [PULL 00/37] s390x update, Peter Maydell, 2021/06/22