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[PATCH 24/55] target/arm: Implement MVE VRMULH
From: |
Peter Maydell |
Subject: |
[PATCH 24/55] target/arm: Implement MVE VRMULH |
Date: |
Mon, 7 Jun 2021 17:57:50 +0100 |
Implement the MVE VRMULH insn, which performs a rounding multiply
and then returns the high half.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/helper-mve.h | 7 +++++++
target/arm/mve.decode | 3 +++
target/arm/mve_helper.c | 22 ++++++++++++++++++++++
target/arm/translate-mve.c | 2 ++
4 files changed, 34 insertions(+)
diff --git a/target/arm/helper-mve.h b/target/arm/helper-mve.h
index 17219df3159..38d084429b8 100644
--- a/target/arm/helper-mve.h
+++ b/target/arm/helper-mve.h
@@ -90,3 +90,10 @@ DEF_HELPER_FLAGS_4(mve_vmulhsw, TCG_CALL_NO_WG, void, env,
ptr, ptr, ptr)
DEF_HELPER_FLAGS_4(mve_vmulhub, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
DEF_HELPER_FLAGS_4(mve_vmulhuh, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
DEF_HELPER_FLAGS_4(mve_vmulhuw, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
+
+DEF_HELPER_FLAGS_4(mve_vrmulhsb, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
+DEF_HELPER_FLAGS_4(mve_vrmulhsh, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
+DEF_HELPER_FLAGS_4(mve_vrmulhsw, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
+DEF_HELPER_FLAGS_4(mve_vrmulhub, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
+DEF_HELPER_FLAGS_4(mve_vrmulhuh, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
+DEF_HELPER_FLAGS_4(mve_vrmulhuw, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
diff --git a/target/arm/mve.decode b/target/arm/mve.decode
index ca4c27209da..4ab6c9dba90 100644
--- a/target/arm/mve.decode
+++ b/target/arm/mve.decode
@@ -85,6 +85,9 @@ VMUL 1110 1111 0 . .. ... 0 ... 0 1001 . 1 . 1
... 0 @2op
VMULH_S 111 0 1110 0 . .. ...1 ... 0 1110 . 0 . 0 ... 1 @2op
VMULH_U 111 1 1110 0 . .. ...1 ... 0 1110 . 0 . 0 ... 1 @2op
+VRMULH_S 111 0 1110 0 . .. ...1 ... 1 1110 . 0 . 0 ... 1 @2op
+VRMULH_U 111 1 1110 0 . .. ...1 ... 1 1110 . 0 . 0 ... 1 @2op
+
# Vector miscellaneous
VCLS 1111 1111 1 . 11 .. 00 ... 0 0100 01 . 0 ... 0 @1op
diff --git a/target/arm/mve_helper.c b/target/arm/mve_helper.c
index 45b1b121ce6..20d96b86f5a 100644
--- a/target/arm/mve_helper.c
+++ b/target/arm/mve_helper.c
@@ -368,9 +368,31 @@ static inline uint32_t do_mulh_w(int64_t n, int64_t m)
return (n * m) >> 32;
}
+static inline uint8_t do_rmulh_b(int32_t n, int32_t m)
+{
+ return (n * m + (1U << 7)) >> 8;
+}
+
+static inline uint16_t do_rmulh_h(int32_t n, int32_t m)
+{
+ return (n * m + (1U << 15)) >> 16;
+}
+
+static inline uint32_t do_rmulh_w(int64_t n, int64_t m)
+{
+ return (n * m + (1U << 31)) >> 32;
+}
+
DO_2OP(vmulhsb, 1, int8_t, H1, do_mulh_b)
DO_2OP(vmulhsh, 2, int16_t, H2, do_mulh_h)
DO_2OP(vmulhsw, 4, int32_t, H4, do_mulh_w)
DO_2OP(vmulhub, 1, uint8_t, H1, do_mulh_b)
DO_2OP(vmulhuh, 2, uint16_t, H2, do_mulh_h)
DO_2OP(vmulhuw, 4, uint32_t, H4, do_mulh_w)
+
+DO_2OP(vrmulhsb, 1, int8_t, H1, do_rmulh_b)
+DO_2OP(vrmulhsh, 2, int16_t, H2, do_rmulh_h)
+DO_2OP(vrmulhsw, 4, int32_t, H4, do_rmulh_w)
+DO_2OP(vrmulhub, 1, uint8_t, H1, do_rmulh_b)
+DO_2OP(vrmulhuh, 2, uint16_t, H2, do_rmulh_h)
+DO_2OP(vrmulhuw, 4, uint32_t, H4, do_rmulh_w)
diff --git a/target/arm/translate-mve.c b/target/arm/translate-mve.c
index edea30ba1d7..7e9d852c6ff 100644
--- a/target/arm/translate-mve.c
+++ b/target/arm/translate-mve.c
@@ -381,3 +381,5 @@ DO_2OP(VSUB, vsub)
DO_2OP(VMUL, vmul)
DO_2OP(VMULH_S, vmulhs)
DO_2OP(VMULH_U, vmulhu)
+DO_2OP(VRMULH_S, vrmulhs)
+DO_2OP(VRMULH_U, vrmulhu)
--
2.20.1
- Re: [PATCH 25/55] target/arm: Implement MVE VMAX, VMIN, (continued)
- [PATCH 28/55] target/arm: Implement MVE VMULL, Peter Maydell, 2021/06/07
- [PATCH 16/55] target/arm: Implement MVE VREV16, VREV32, VREV64, Peter Maydell, 2021/06/07
- [PATCH 15/55] bitops.h: Provide hswap32(), hswap64(), wswap64() swapping operations, Peter Maydell, 2021/06/07
- [PATCH 26/55] target/arm: Implement MVE VABD, Peter Maydell, 2021/06/07
- [PATCH 24/55] target/arm: Implement MVE VRMULH,
Peter Maydell <=
- [PATCH 39/55] target/arm: Implement MVE VQDMULH and VQRDMULH (scalar), Peter Maydell, 2021/06/07
- [PATCH 31/55] include/qemu/int128.h: Add function to create Int128 from int64_t, Peter Maydell, 2021/06/07
- [PATCH 36/55] target/arm: Implement MVE VBRSR, Peter Maydell, 2021/06/07
- [PATCH 40/55] target/arm: Implement MVE VQDMULL scalar, Peter Maydell, 2021/06/07