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[PULL 04/13] target/i386: tcg: fix segment register offsets for 16-bit T
From: |
Paolo Bonzini |
Subject: |
[PULL 04/13] target/i386: tcg: fix segment register offsets for 16-bit TSS |
Date: |
Fri, 4 Jun 2021 17:17:36 +0200 |
The TSS offsets in the manuals have only 2-byte slots for the
segment registers. QEMU incorrectly uses 4-byte slots, so
that SS overlaps the LDT selector.
Resolves: #382
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/tcg/seg_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c
index 2f6cdc8239..547b959689 100644
--- a/target/i386/tcg/seg_helper.c
+++ b/target/i386/tcg/seg_helper.c
@@ -281,7 +281,7 @@ static void switch_tss_ra(CPUX86State *env, int
tss_selector,
retaddr) | 0xffff0000;
}
for (i = 0; i < 4; i++) {
- new_segs[i] = cpu_lduw_kernel_ra(env, tss_base + (0x22 + i * 4),
+ new_segs[i] = cpu_lduw_kernel_ra(env, tss_base + (0x22 + i * 2),
retaddr);
}
new_ldt = cpu_lduw_kernel_ra(env, tss_base + 0x2a, retaddr);
@@ -349,7 +349,7 @@ static void switch_tss_ra(CPUX86State *env, int
tss_selector,
cpu_stw_kernel_ra(env, env->tr.base + (0x12 + 6 * 2),
env->regs[R_ESI], retaddr);
cpu_stw_kernel_ra(env, env->tr.base + (0x12 + 7 * 2),
env->regs[R_EDI], retaddr);
for (i = 0; i < 4; i++) {
- cpu_stw_kernel_ra(env, env->tr.base + (0x22 + i * 4),
+ cpu_stw_kernel_ra(env, env->tr.base + (0x22 + i * 2),
env->segs[i].selector, retaddr);
}
}
--
2.31.1
- [PULL 00/13] Misc bugfix patches for 2021-06-04, Paolo Bonzini, 2021/06/04
- [PULL 02/13] iscsi: link libm into the module, Paolo Bonzini, 2021/06/04
- [PULL 01/13] meson: allow optional dependencies for block modules, Paolo Bonzini, 2021/06/04
- [PULL 03/13] oslib-posix: Remove OpenBSD workaround for fcntl("/dev/null", F_SETFL, O_NONBLOCK) failure, Paolo Bonzini, 2021/06/04
- [PULL 04/13] target/i386: tcg: fix segment register offsets for 16-bit TSS,
Paolo Bonzini <=
- [PULL 05/13] target/i386: tcg: fix loading of registers from 16-bit TSS, Paolo Bonzini, 2021/06/04
- [PULL 08/13] tests/qtest/virtio-scsi-test: add unmap large LBA with 4k blocks test, Paolo Bonzini, 2021/06/04
- [PULL 07/13] target/i386: Fix decode of cr8, Paolo Bonzini, 2021/06/04
- [PULL 06/13] target/i386: tcg: fix switching from 16-bit to 32-bit tasks or vice versa, Paolo Bonzini, 2021/06/04
- [PULL 09/13] i386: reorder call to cpu_exec_realizefn, Paolo Bonzini, 2021/06/04
- [PULL 12/13] vl: plumb keyval-based options into -readconfig, Paolo Bonzini, 2021/06/04
- [PULL 10/13] i386: run accel_cpu_instance_init as post_init, Paolo Bonzini, 2021/06/04
- [PULL 11/13] qemu-config: parse configuration files to a QDict, Paolo Bonzini, 2021/06/04
- [PULL 13/13] vl: plug -object back into -readconfig, Paolo Bonzini, 2021/06/04