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[PULL 02/42] target/ppc: moved ppc_store_lpcr and ppc_store_msr to cpu.c
From: |
David Gibson |
Subject: |
[PULL 02/42] target/ppc: moved ppc_store_lpcr and ppc_store_msr to cpu.c |
Date: |
Thu, 3 Jun 2021 18:21:51 +1000 |
From: "Bruno Larsen (billionai)" <bruno.larsen@eldorado.org.br>
These functions are used in hw/ppc logic, during machine startup, which
means it must be compiled when --disable-tcg is selected, and so it has
been moved into a common code file
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20210521201759.85475-3-bruno.larsen@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
target/ppc/cpu.c | 17 +++++++++++++++++
target/ppc/misc_helper.c | 16 ----------------
2 files changed, 17 insertions(+), 16 deletions(-)
diff --git a/target/ppc/cpu.c b/target/ppc/cpu.c
index 9cf3288b7a..c8e87e30f1 100644
--- a/target/ppc/cpu.c
+++ b/target/ppc/cpu.c
@@ -24,6 +24,7 @@
#include "exec/log.h"
#include "fpu/softfloat-helpers.h"
#include "mmu-hash64.h"
+#include "helper_regs.h"
target_ulong cpu_read_xer(CPUPPCState *env)
{
@@ -92,3 +93,19 @@ void ppc_store_sdr1(CPUPPCState *env, target_ulong value)
env->spr[SPR_SDR1] = value;
}
#endif /* CONFIG_SOFTMMU */
+
+/* GDBstub can read and write MSR... */
+void ppc_store_msr(CPUPPCState *env, target_ulong value)
+{
+ hreg_store_msr(env, value, 0);
+}
+
+void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val)
+{
+ PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
+ CPUPPCState *env = &cpu->env;
+
+ env->spr[SPR_LPCR] = val & pcc->lpcr_mask;
+ /* The gtse bit affects hflags */
+ hreg_compute_hflags(env);
+}
diff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c
index 08a31da289..442b12652c 100644
--- a/target/ppc/misc_helper.c
+++ b/target/ppc/misc_helper.c
@@ -255,22 +255,6 @@ target_ulong helper_clcs(CPUPPCState *env, uint32_t arg)
/*****************************************************************************/
/* Special registers manipulation */
-/* GDBstub can read and write MSR... */
-void ppc_store_msr(CPUPPCState *env, target_ulong value)
-{
- hreg_store_msr(env, value, 0);
-}
-
-void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val)
-{
- PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
- CPUPPCState *env = &cpu->env;
-
- env->spr[SPR_LPCR] = val & pcc->lpcr_mask;
- /* The gtse bit affects hflags */
- hreg_compute_hflags(env);
-}
-
/*
* This code is lifted from MacOnLinux. It is called whenever THRM1,2
* or 3 is read an fixes up the values in such a way that will make
--
2.31.1
- [PULL 00/42] ppc-for-6.1 queue 20210603, David Gibson, 2021/06/03
- [PULL 02/42] target/ppc: moved ppc_store_lpcr and ppc_store_msr to cpu.c,
David Gibson <=
- [PULL 04/42] target/ppc: removed unnecessary inclusion of helper-proto.h, David Gibson, 2021/06/03
- [PULL 01/42] target/ppc: cleaned error_report from ppc_store_sdr1, David Gibson, 2021/06/03
- [PULL 03/42] target/ppc: reduce usage of fpscr_set_rounding_mode, David Gibson, 2021/06/03
- [PULL 06/42] spapr: Fix EEH capability issue on KVM guest for PCI passthru, David Gibson, 2021/06/03
- [PULL 10/42] spapr: Remove stale comment about power-saving LPCR bits, David Gibson, 2021/06/03
- [PULL 07/42] spapr: nvdimm: Forward declare and move the definitions, David Gibson, 2021/06/03
- [PULL 11/42] spapr: Set LPCR to current AIL mode when starting a new CPU, David Gibson, 2021/06/03
- [PULL 05/42] spapr: Don't hijack current_machine->boot_order, David Gibson, 2021/06/03
- [PULL 12/42] target/ppc: used ternary operator when registering MAS, David Gibson, 2021/06/03
- [PULL 14/42] target/ppc: created tcg-stub.c file, David Gibson, 2021/06/03