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[PULL 04/31] exec/memory_ldst_phys: Use correct type sizes
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From: |
Richard Henderson |
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Subject: |
[PULL 04/31] exec/memory_ldst_phys: Use correct type sizes |
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Date: |
Wed, 26 May 2021 16:46:43 -0700 |
From: Philippe Mathieu-Daudé <philmd@redhat.com>
Use uint8_t for (unsigned) byte, and uint16_t for (unsigned)
16-bit word.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20210518183655.1711377-5-philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/memory_ldst_phys.h.inc | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/include/exec/memory_ldst_phys.h.inc
b/include/exec/memory_ldst_phys.h.inc
index 4033795add..ecd678610d 100644
--- a/include/exec/memory_ldst_phys.h.inc
+++ b/include/exec/memory_ldst_phys.h.inc
@@ -20,7 +20,7 @@
*/
#ifdef TARGET_ENDIANNESS
-static inline uint32_t glue(lduw_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
+static inline uint16_t glue(lduw_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
{
return glue(address_space_lduw, SUFFIX)(ARG1, addr,
MEMTXATTRS_UNSPECIFIED, NULL);
@@ -38,7 +38,7 @@ static inline uint64_t glue(ldq_phys, SUFFIX)(ARG1_DECL,
hwaddr addr)
MEMTXATTRS_UNSPECIFIED, NULL);
}
-static inline void glue(stw_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
+static inline void glue(stw_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint16_t val)
{
glue(address_space_stw, SUFFIX)(ARG1, addr, val,
MEMTXATTRS_UNSPECIFIED, NULL);
@@ -56,19 +56,19 @@ static inline void glue(stq_phys, SUFFIX)(ARG1_DECL, hwaddr
addr, uint64_t val)
MEMTXATTRS_UNSPECIFIED, NULL);
}
#else
-static inline uint32_t glue(ldub_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
+static inline uint8_t glue(ldub_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
{
return glue(address_space_ldub, SUFFIX)(ARG1, addr,
MEMTXATTRS_UNSPECIFIED, NULL);
}
-static inline uint32_t glue(lduw_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
+static inline uint16_t glue(lduw_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
{
return glue(address_space_lduw_le, SUFFIX)(ARG1, addr,
MEMTXATTRS_UNSPECIFIED, NULL);
}
-static inline uint32_t glue(lduw_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
+static inline uint16_t glue(lduw_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
{
return glue(address_space_lduw_be, SUFFIX)(ARG1, addr,
MEMTXATTRS_UNSPECIFIED, NULL);
@@ -98,19 +98,19 @@ static inline uint64_t glue(ldq_be_phys, SUFFIX)(ARG1_DECL,
hwaddr addr)
MEMTXATTRS_UNSPECIFIED, NULL);
}
-static inline void glue(stb_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
+static inline void glue(stb_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint8_t val)
{
glue(address_space_stb, SUFFIX)(ARG1, addr, val,
MEMTXATTRS_UNSPECIFIED, NULL);
}
-static inline void glue(stw_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t
val)
+static inline void glue(stw_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint16_t
val)
{
glue(address_space_stw_le, SUFFIX)(ARG1, addr, val,
MEMTXATTRS_UNSPECIFIED, NULL);
}
-static inline void glue(stw_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t
val)
+static inline void glue(stw_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint16_t
val)
{
glue(address_space_stw_be, SUFFIX)(ARG1, addr, val,
MEMTXATTRS_UNSPECIFIED, NULL);
--
2.25.1
- [PULL 16/31] cpu: Directly use get_paging_enabled() fallback handlers in place, (continued)
- [PULL 16/31] cpu: Directly use get_paging_enabled() fallback handlers in place, Richard Henderson, 2021/05/26
- [PULL 07/31] accel/tcg: Reduce 'exec/tb-context.h' inclusion, Richard Henderson, 2021/05/26
- [PULL 02/31] exec/memory_ldst_phys: Sort declarations, Richard Henderson, 2021/05/26
- [PULL 06/31] exec/memory: Use correct type size, Richard Henderson, 2021/05/26
- [PULL 05/31] exec/memory_ldst_cached: Use correct type size, Richard Henderson, 2021/05/26
- [PULL 09/31] replay: fix watchpoint processing for reverse debugging, Richard Henderson, 2021/05/26
- [PULL 10/31] tcg/aarch64: Fix tcg_out_rotl, Richard Henderson, 2021/05/26
- [PULL 08/31] accel/tcg: Keep TranslationBlock headers local to TCG, Richard Henderson, 2021/05/26
- [PULL 13/31] cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs, Richard Henderson, 2021/05/26
- [PULL 12/31] cpu: Split as cpu-common / cpu-sysemu, Richard Henderson, 2021/05/26
- [PULL 04/31] exec/memory_ldst_phys: Use correct type sizes,
Richard Henderson <=
- [PULL 15/31] cpu: Directly use cpu_write_elf*() fallback handlers in place, Richard Henderson, 2021/05/26
- [PULL 20/31] cpu: Move AVR target vmsd field from CPUClass to DeviceClass, Richard Henderson, 2021/05/26
- [PULL 26/31] cpu: Move CPUClass::asidx_from_attrs to SysemuCPUOps, Richard Henderson, 2021/05/26
- [PULL 17/31] cpu: Directly use get_memory_mapping() fallback handlers in place, Richard Henderson, 2021/05/26
- [PULL 18/31] cpu: Assert DeviceClass::vmsd is NULL on user emulation, Richard Henderson, 2021/05/26
- [PULL 19/31] cpu: Rename CPUClass vmsd -> legacy_vmsd, Richard Henderson, 2021/05/26
- [PULL 22/31] cpu: Move CPUClass::vmsd to SysemuCPUOps, Richard Henderson, 2021/05/26
- [PULL 23/31] cpu: Move CPUClass::virtio_is_big_endian to SysemuCPUOps, Richard Henderson, 2021/05/26
- [PULL 24/31] cpu: Move CPUClass::get_crash_info to SysemuCPUOps, Richard Henderson, 2021/05/26
- [PULL 30/31] target/mips: Fold jazz behaviour into mips_cpu_do_transaction_failed, Richard Henderson, 2021/05/26