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[PATCH v7 00/92] target/arm: Implement SVE2


From: Richard Henderson
Subject: [PATCH v7 00/92] target/arm: Implement SVE2
Date: Mon, 24 May 2021 18:02:26 -0700

Changes for v7:
  * Incorporate patch review, some of which broke out new patches.
  * Recover 4 patches which somehow got dropped during the v6 rebase.
    This should have been caught by risu testing, but I must have
    thought the rebase trivial enough to skip that step.  Oops.

The patches lacking r-b are:

 06-target-arm-Implement-SVE2-saturating-rounding-bit.patch
 48-target-arm-Use-correct-output-type-for-gvec_sdot_.patch
 60-target-arm-Implement-SVE2-multiply-add-long-index.patch
 61-target-arm-Implement-SVE2-integer-multiply-long-i.patch
 62-target-arm-Implement-SVE2-complex-integer-multipl.patch
 63-target-arm-Implement-SVE2-complex-integer-dot-pro.patch
 64-target-arm-Macroize-helper_gvec_-s-u-dot_-b-h.patch
 65-target-arm-Macroize-helper_gvec_-s-u-dot_idx_-b-h.patch
 75-target-arm-Implement-SVE2-FLOGB.patch
 76-target-arm-Share-table-of-sve-load-functions.patch
 77-target-arm-Tidy-do_ldrq.patch
 81-target-arm-Move-endian-adjustment-macros-to-vec_i.patch
 86-target-arm-Fix-decode-for-VDOT-indexed.patch
 87-target-arm-Split-out-do_neon_ddda.patch
 92-target-arm-Enable-SVE2-and-related-extensions.patch


r~


Richard Henderson (75):
  target/arm: Add ID_AA64ZFR0 fields and isar_feature_aa64_sve2
  target/arm: Implement SVE2 Integer Multiply - Unpredicated
  target/arm: Implement SVE2 integer pairwise add and accumulate long
  target/arm: Implement SVE2 integer unary operations (predicated)
  target/arm: Split out saturating/rounding shifts from neon
  target/arm: Implement SVE2 saturating/rounding bitwise shift left
    (predicated)
  target/arm: Implement SVE2 integer halving add/subtract (predicated)
  target/arm: Implement SVE2 integer pairwise arithmetic
  target/arm: Implement SVE2 saturating add/subtract (predicated)
  target/arm: Implement SVE2 integer add/subtract long
  target/arm: Implement SVE2 integer add/subtract interleaved long
  target/arm: Implement SVE2 integer add/subtract wide
  target/arm: Implement SVE2 integer multiply long
  target/arm: Implement SVE2 PMULLB, PMULLT
  target/arm: Implement SVE2 bitwise shift left long
  target/arm: Implement SVE2 bitwise exclusive-or interleaved
  target/arm: Implement SVE2 bitwise permute
  target/arm: Implement SVE2 complex integer add
  target/arm: Implement SVE2 integer absolute difference and accumulate
    long
  target/arm: Implement SVE2 integer add/subtract long with carry
  target/arm: Implement SVE2 bitwise shift right and accumulate
  target/arm: Implement SVE2 bitwise shift and insert
  target/arm: Implement SVE2 integer absolute difference and accumulate
  target/arm: Implement SVE2 saturating extract narrow
  target/arm: Implement SVE2 SHRN, RSHRN
  target/arm: Implement SVE2 SQSHRUN, SQRSHRUN
  target/arm: Implement SVE2 UQSHRN, UQRSHRN
  target/arm: Implement SVE2 SQSHRN, SQRSHRN
  target/arm: Implement SVE2 WHILEGT, WHILEGE, WHILEHI, WHILEHS
  target/arm: Implement SVE2 WHILERW, WHILEWR
  target/arm: Implement SVE2 bitwise ternary operations
  target/arm: Implement SVE2 saturating multiply-add long
  target/arm: Implement SVE2 saturating multiply-add high
  target/arm: Implement SVE2 integer multiply-add long
  target/arm: Implement SVE2 complex integer multiply-add
  target/arm: Implement SVE2 XAR
  target/arm: Use correct output type for gvec_sdot_*_b
  target/arm: Pass separate addend to {U,S}DOT helpers
  target/arm: Pass separate addend to FCMLA helpers
  target/arm: Split out formats for 2 vectors + 1 index
  target/arm: Split out formats for 3 vectors + 1 index
  target/arm: Implement SVE2 integer multiply (indexed)
  target/arm: Implement SVE2 integer multiply-add (indexed)
  target/arm: Implement SVE2 saturating multiply-add high (indexed)
  target/arm: Implement SVE2 saturating multiply-add (indexed)
  target/arm: Implement SVE2 saturating multiply (indexed)
  target/arm: Implement SVE2 signed saturating doubling multiply high
  target/arm: Implement SVE2 saturating multiply high (indexed)
  target/arm: Implement SVE2 multiply-add long (indexed)
  target/arm: Implement SVE2 integer multiply long (indexed)
  target/arm: Implement SVE2 complex integer multiply-add (indexed)
  target/arm: Implement SVE2 complex integer dot product
  target/arm: Macroize helper_gvec_{s,u}dot_{b,h}
  target/arm: Macroize helper_gvec_{s,u}dot_idx_{b,h}
  target/arm: Implement SVE mixed sign dot product (indexed)
  target/arm: Implement SVE mixed sign dot product
  target/arm: Implement SVE2 crypto unary operations
  target/arm: Implement SVE2 crypto destructive binary operations
  target/arm: Implement SVE2 crypto constructive binary operations
  target/arm: Implement SVE2 FCVTNT
  target/arm: Share table of sve load functions
  target/arm: Tidy do_ldrq
  target/arm: Implement SVE2 LD1RO
  target/arm: Implement 128-bit ZIP, UZP, TRN
  target/arm: Move endian adjustment macros to vec_internal.h
  target/arm: Implement aarch64 SUDOT, USDOT
  target/arm: Split out do_neon_ddda_fpst
  target/arm: Remove unused fpst from VDOT_scalar
  target/arm: Fix decode for VDOT (indexed)
  target/arm: Split out do_neon_ddda
  target/arm: Split decode of VSDOT and VUDOT
  target/arm: Implement aarch32 VSUDOT, VUSDOT
  target/arm: Implement integer matrix multiply accumulate
  linux-user/aarch64: Enable hwcap bits for sve2 and related extensions
  target/arm: Enable SVE2 and related extensions

Stephen Long (17):
  target/arm: Implement SVE2 floating-point pairwise
  target/arm: Implement SVE2 MATCH, NMATCH
  target/arm: Implement SVE2 ADDHNB, ADDHNT
  target/arm: Implement SVE2 RADDHNB, RADDHNT
  target/arm: Implement SVE2 SUBHNB, SUBHNT
  target/arm: Implement SVE2 RSUBHNB, RSUBHNT
  target/arm: Implement SVE2 HISTCNT, HISTSEG
  target/arm: Implement SVE2 scatter store insns
  target/arm: Implement SVE2 gather load insns
  target/arm: Implement SVE2 FMMLA
  target/arm: Implement SVE2 SPLICE, EXT
  target/arm: Implement SVE2 TBL, TBX
  target/arm: Implement SVE2 FCVTLT
  target/arm: Implement SVE2 FCVTXNT, FCVTX
  target/arm: Implement SVE2 FLOGB
  target/arm: Implement SVE2 bitwise shift immediate
  target/arm: Implement SVE2 fp multiply-add long

 target/arm/cpu.h              |   66 +
 target/arm/helper-sve.h       |  722 +++++++-
 target/arm/helper.h           |  110 +-
 target/arm/translate-a64.h    |    3 +
 target/arm/vec_internal.h     |  167 ++
 target/arm/neon-shared.decode |   24 +-
 target/arm/sve.decode         |  574 +++++-
 linux-user/elfload.c          |   10 +
 target/arm/cpu.c              |    2 +
 target/arm/cpu64.c            |   13 +
 target/arm/cpu_tcg.c          |    1 +
 target/arm/helper.c           |    3 +-
 target/arm/kvm64.c            |   21 +-
 target/arm/neon_helper.c      |  507 +-----
 target/arm/sve_helper.c       | 2110 ++++++++++++++++++++--
 target/arm/translate-a64.c    |  111 +-
 target/arm/translate-neon.c   |  231 ++-
 target/arm/translate-sve.c    | 3200 +++++++++++++++++++++++++++++++--
 target/arm/vec_helper.c       |  887 ++++++---
 19 files changed, 7656 insertions(+), 1106 deletions(-)

-- 
2.25.1




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