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[PULL 16/50] target/i386: Tidy REX_B, REX_X definition
From: |
Richard Henderson |
Subject: |
[PULL 16/50] target/i386: Tidy REX_B, REX_X definition |
Date: |
Wed, 19 May 2021 13:30:16 -0500 |
Change the storage from int to uint8_t since the value is in {0,8}.
For x86_64 add 0 in the macros to (1) promote the type back to int,
and (2) make the macro an rvalue.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20210514151342.384376-17-richard.henderson@linaro.org>
---
target/i386/tcg/translate.c | 17 +++++++----------
1 file changed, 7 insertions(+), 10 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 79a37fb1a7..9bb37215d8 100644
--- a/target/i386/tcg/translate.c
+++ b/target/i386/tcg/translate.c
@@ -41,14 +41,6 @@
#define PREFIX_VEX 0x20
#define PREFIX_REX 0x40
-#ifdef TARGET_X86_64
-#define REX_X(s) ((s)->rex_x)
-#define REX_B(s) ((s)->rex_b)
-#else
-#define REX_X(s) 0
-#define REX_B(s) 0
-#endif
-
#ifdef TARGET_X86_64
# define ctztl ctz64
# define clztl clz64
@@ -100,7 +92,8 @@ typedef struct DisasContext {
#endif
#ifdef TARGET_X86_64
- int rex_x, rex_b;
+ uint8_t rex_x;
+ uint8_t rex_b;
#endif
int vex_l; /* vex vector length */
int vex_v; /* vex vvvv register, without 1's complement. */
@@ -173,8 +166,12 @@ typedef struct DisasContext {
#ifdef TARGET_X86_64
#define REX_PREFIX(S) (((S)->prefix & PREFIX_REX) != 0)
+#define REX_X(S) ((S)->rex_x + 0)
+#define REX_B(S) ((S)->rex_b + 0)
#else
#define REX_PREFIX(S) false
+#define REX_X(S) 0
+#define REX_B(S) 0
#endif
static void gen_eob(DisasContext *s);
@@ -4617,7 +4614,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState
*cpu)
rex_w = (b >> 3) & 1;
rex_r = (b & 0x4) << 1;
s->rex_x = (b & 0x2) << 2;
- REX_B(s) = (b & 0x1) << 3;
+ s->rex_b = (b & 0x1) << 3;
goto next_byte;
}
break;
--
2.25.1
- [PULL 03/50] target/i386: Unify code paths for IRET, (continued)
- [PULL 03/50] target/i386: Unify code paths for IRET, Richard Henderson, 2021/05/19
- [PULL 01/50] target/i386: Split out gen_exception_gpf, Richard Henderson, 2021/05/19
- [PULL 05/50] target/i386: Split out check_iopl, Richard Henderson, 2021/05/19
- [PULL 08/50] target/i386: Assert IOPL is 0 for user-only, Richard Henderson, 2021/05/19
- [PULL 07/50] target/i386: Assert CPL is 3 for user-only, Richard Henderson, 2021/05/19
- [PULL 06/50] target/i386: Assert PE is set for user-only, Richard Henderson, 2021/05/19
- [PULL 10/50] target/i386: Assert CODE32 for x86_64 user-only, Richard Henderson, 2021/05/19
- [PULL 11/50] target/i386: Assert SS32 for x86_64 user-only, Richard Henderson, 2021/05/19
- [PULL 13/50] target/i386: Assert LMA for x86_64 user-only, Richard Henderson, 2021/05/19
- [PULL 12/50] target/i386: Assert CODE64 for x86_64 user-only, Richard Henderson, 2021/05/19
- [PULL 16/50] target/i386: Tidy REX_B, REX_X definition,
Richard Henderson <=
- [PULL 09/50] target/i386: Assert !VM86 for x86_64 user-only, Richard Henderson, 2021/05/19
- [PULL 14/50] target/i386: Assert !ADDSEG for x86_64 user-only, Richard Henderson, 2021/05/19
- [PULL 18/50] target/i386: Move rex_w into DisasContext, Richard Henderson, 2021/05/19
- [PULL 17/50] target/i386: Move rex_r into DisasContext, Richard Henderson, 2021/05/19
- [PULL 15/50] target/i386: Introduce REX_PREFIX, Richard Henderson, 2021/05/19
- [PULL 22/50] target/i386: Reduce DisasContext.prefix to uint8_t, Richard Henderson, 2021/05/19
- [PULL 23/50] target/i386: Reduce DisasContext.vex_[lv] to uint8_t, Richard Henderson, 2021/05/19
- [PULL 21/50] target/i386: Reduce DisasContext.override to int8_t, Richard Henderson, 2021/05/19
- [PULL 29/50] target/i386: Add stub generator for helper_set_dr, Richard Henderson, 2021/05/19
- [PULL 19/50] target/i386: Remove DisasContext.f_st as unused, Richard Henderson, 2021/05/19