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[PATCH v2] target/riscv: Dump CSR mscratch/sscratch/satp
From: |
Changbin Du |
Subject: |
[PATCH v2] target/riscv: Dump CSR mscratch/sscratch/satp |
Date: |
Wed, 19 May 2021 23:57:38 +0800 |
This dumps the CSR mscratch/sscratch/satp and meanwhile aligns
the output of CSR mtval/stval.
Signed-off-by: Changbin Du <changbin.du@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
v2: Rebase to latest mainline.
---
target/riscv/cpu.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 3191fd0082..c4132d9845 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -286,12 +286,15 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f,
int flags)
if (riscv_has_ext(env, RVH)) {
qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "vscause ", env->vscause);
}
- qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mtval ", env->mtval);
- qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "stval ", env->stval);
+ qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mtval ", env->mtval);
+ qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "stval ", env->stval);
if (riscv_has_ext(env, RVH)) {
qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "htval ", env->htval);
qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mtval2 ", env->mtval2);
}
+ qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mscratch", env->mscratch);
+ qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "sscratch", env->sscratch);
+ qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "satp ", env->satp);
#endif
for (i = 0; i < 32; i++) {
--
2.30.2
- [PATCH v2] target/riscv: Dump CSR mscratch/sscratch/satp,
Changbin Du <=