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[PULL 33/48] target/ppc: Fix load endianness for lxvwsx/lxvdsx
From: |
David Gibson |
Subject: |
[PULL 33/48] target/ppc: Fix load endianness for lxvwsx/lxvdsx |
Date: |
Wed, 19 May 2021 22:51:33 +1000 |
From: Giuseppe Musacchio <thatlemon@gmail.com>
TARGET_WORDS_BIGENDIAN may not match the machine endianness if that's a
runtime-configurable parameter.
Fixes: bcb0b7b1a1c05707304f80ca6f523d557816f85c
Fixes: afae37d98ae991c0792c867dbd9f32f988044318
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/212
Signed-off-by: Giuseppe Musacchio <thatlemon@gmail.com>
Message-Id: <20210518133020.58927-1-thatlemon@gmail.com>
Tested-by: Paul A. Clarke <pc@us.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
target/ppc/translate/vsx-impl.c.inc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/ppc/translate/vsx-impl.c.inc
b/target/ppc/translate/vsx-impl.c.inc
index b817d31260..57a7f73bba 100644
--- a/target/ppc/translate/vsx-impl.c.inc
+++ b/target/ppc/translate/vsx-impl.c.inc
@@ -139,7 +139,7 @@ static void gen_lxvwsx(DisasContext *ctx)
gen_addr_reg_index(ctx, EA);
data = tcg_temp_new_i32();
- tcg_gen_qemu_ld_i32(data, EA, ctx->mem_idx, MO_TEUL);
+ tcg_gen_qemu_ld_i32(data, EA, ctx->mem_idx, DEF_MEMOP(MO_UL));
tcg_gen_gvec_dup_i32(MO_UL, vsr_full_offset(xT(ctx->opcode)), 16, 16,
data);
tcg_temp_free(EA);
@@ -162,7 +162,7 @@ static void gen_lxvdsx(DisasContext *ctx)
gen_addr_reg_index(ctx, EA);
data = tcg_temp_new_i64();
- tcg_gen_qemu_ld_i64(data, EA, ctx->mem_idx, MO_TEQ);
+ tcg_gen_qemu_ld_i64(data, EA, ctx->mem_idx, DEF_MEMOP(MO_Q));
tcg_gen_gvec_dup_i64(MO_Q, vsr_full_offset(xT(ctx->opcode)), 16, 16, data);
tcg_temp_free(EA);
--
2.31.1
- [PULL 23/48] target/ppc: Replace POWERPC_EXCP_SYNC with DISAS_EXIT, (continued)
- [PULL 23/48] target/ppc: Replace POWERPC_EXCP_SYNC with DISAS_EXIT, David Gibson, 2021/05/19
- [PULL 25/48] target/ppc: Introduce gen_icount_io_start, David Gibson, 2021/05/19
- [PULL 29/48] target/ppc: Move single-step check to ppc_tr_tb_stop, David Gibson, 2021/05/19
- [PULL 28/48] target/ppc: Remove DisasContext.exception, David Gibson, 2021/05/19
- [PULL 30/48] target/ppc: Tidy exception vs exit_tb, David Gibson, 2021/05/19
- [PULL 34/48] target/ppc: Introduce prot_for_access_type, David Gibson, 2021/05/19
- [PULL 27/48] target/ppc: Replace POWERPC_EXCP_BRANCH with DISAS_NORETURN, David Gibson, 2021/05/19
- [PULL 32/48] target/ppc: Use translator_loop_temp_check, David Gibson, 2021/05/19
- [PULL 41/48] target/ppc: Remove type argument from ppc6xx_tlb_pte_check, David Gibson, 2021/05/19
- [PULL 31/48] target/ppc: Mark helper_raise_exception* as noreturn, David Gibson, 2021/05/19
- [PULL 33/48] target/ppc: Fix load endianness for lxvwsx/lxvdsx,
David Gibson <=
- [PULL 37/48] target/ppc: Use MMUAccessType in mmu-hash32.c, David Gibson, 2021/05/19
- [PULL 35/48] target/ppc: Use MMUAccessType in mmu-radix64.c, David Gibson, 2021/05/19
- [PULL 38/48] target/ppc: Rename access_type to type in mmu_helper.c, David Gibson, 2021/05/19
- [PULL 39/48] target/ppc: Use MMUAccessType in mmu_helper.c, David Gibson, 2021/05/19
- [PULL 45/48] target/ppc: Remove type argument from mmubooke_check_tlb, David Gibson, 2021/05/19
- [PULL 40/48] target/ppc: Remove type argument from check_prot, David Gibson, 2021/05/19
- [PULL 44/48] target/ppc: Remove type argument from mmu40x_get_physical_address, David Gibson, 2021/05/19
- [PULL 36/48] target/ppc: Use MMUAccessType in mmu-hash64.c, David Gibson, 2021/05/19
- [PULL 43/48] target/ppc: Remove type argument from get_bat_6xx_tlb, David Gibson, 2021/05/19
- [PULL 42/48] target/ppc: Remove type argument from ppc6xx_tlb_check, David Gibson, 2021/05/19