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[PULL 03/26] target/arm: Fix tlbbits calculation in tlbi_aa64_vae2is_wri
From: |
Peter Maydell |
Subject: |
[PULL 03/26] target/arm: Fix tlbbits calculation in tlbi_aa64_vae2is_write() |
Date: |
Mon, 10 May 2021 13:25:25 +0100 |
In tlbi_aa64_vae2is_write() the calculation
bits = tlbbits_for_regime(env, secure ? ARMMMUIdx_E2 : ARMMMUIdx_SE2,
pageaddr)
has the two arms of the ?: expression reversed. Fix the bug.
Fixes: b6ad6062f1e5
Reported-by: Rebecca Cran <rebecca@nuviainc.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
Reviewed-by: Rebecca Cran <rebecca@nuviainc.com>
Message-id: 20210420123106.10861-1-peter.maydell@linaro.org
---
target/arm/helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 9b1b98705f9..3b365a78cbc 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -4742,7 +4742,7 @@ static void tlbi_aa64_vae2is_write(CPUARMState *env,
const ARMCPRegInfo *ri,
uint64_t pageaddr = sextract64(value << 12, 0, 56);
bool secure = arm_is_secure_below_el3(env);
int mask = secure ? ARMMMUIdxBit_SE2 : ARMMMUIdxBit_E2;
- int bits = tlbbits_for_regime(env, secure ? ARMMMUIdx_E2 : ARMMMUIdx_SE2,
+ int bits = tlbbits_for_regime(env, secure ? ARMMMUIdx_SE2 : ARMMMUIdx_E2,
pageaddr);
tlb_flush_page_bits_by_mmuidx_all_cpus_synced(cs, pageaddr, mask, bits);
--
2.20.1
- [PULL 00/26] target-arm queue, Peter Maydell, 2021/05/10
- [PULL 02/26] linux-user/aarch64: Enable hwcap for RND, BTI, and MTE, Peter Maydell, 2021/05/10
- [PULL 01/26] docs: fix link in sbsa description, Peter Maydell, 2021/05/10
- [PULL 03/26] target/arm: Fix tlbbits calculation in tlbi_aa64_vae2is_write(),
Peter Maydell <=
- [PULL 04/26] target/arm: Move constant expanders to translate.h, Peter Maydell, 2021/05/10
- [PULL 06/26] target/arm: Make functions used by m-nocp global, Peter Maydell, 2021/05/10
- [PULL 05/26] target/arm: Share unallocated_encoding() and gen_exception_insn(), Peter Maydell, 2021/05/10
- [PULL 07/26] target/arm: Split m-nocp trans functions into their own file, Peter Maydell, 2021/05/10
- [PULL 08/26] target/arm: Move gen_aa32 functions to translate-a32.h, Peter Maydell, 2021/05/10
- [PULL 12/26] target/arm: Move vfp_reg_ptr() to translate-neon.c.inc, Peter Maydell, 2021/05/10
- [PULL 10/26] target/arm: Make functions used by translate-vfp global, Peter Maydell, 2021/05/10
- [PULL 09/26] target/arm: Move vfp_{load, store}_reg{32, 64} to translate-vfp.c.inc, Peter Maydell, 2021/05/10
- [PULL 11/26] target/arm: Make translate-vfp.c.inc its own compilation unit, Peter Maydell, 2021/05/10
- [PULL 14/26] target/arm: Move NeonGenThreeOpEnvFn typedef to translate.h, Peter Maydell, 2021/05/10