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Re: [PATCH v8 1/4] accel/tcg: Add TLB invalidation support for ranges of
Re: [PATCH v8 1/4] accel/tcg: Add TLB invalidation support for ranges of addresses
Sat, 8 May 2021 08:55:45 -0700
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On 5/4/21 8:04 PM, Rebecca Cran wrote:
Add functions to support the FEAT_TLBIRANGE ARMv8.4 feature that adds
TLB invalidation instructions to invalidate ranges of addresses.
Signed-off-by: Rebecca Cran<email@example.com>
accel/tcg/cputlb.c | 128 +++++++++++++++++++-
include/exec/exec-all.h | 46 +++++++
2 files changed, 171 insertions(+), 3 deletions(-)
I guess this is ok.
I would have switched things around such that tlb_flush_page_bits_locked used
tlb_flush_range_locked, passing TARGET_PAGE_SIZE for the length.
I would check for a very long length and flush the whole tlb, lest we spend too
long going round and round the same set of tlb entries.
I would not skip the third function in the triple, *_all_cpus, which is unused
by arm but we have for every other tlb flushing function in this set.
I'll whip something up and post it.