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[RFC PATCH 0/5] RISC-V:support Nuclei FPGA Evaluation Kit
From: |
wangjunqiang |
Subject: |
[RFC PATCH 0/5] RISC-V:support Nuclei FPGA Evaluation Kit |
Date: |
Fri, 7 May 2021 16:16:49 +0800 |
This patch series provides an implementation of Nuclei FPGA Machine[1].
At present, only MCU mode support is included. In mcu mode, We will
use eclic[2] as interrupt controller. It is compatible with clic
in Machine mode. But It contains some customized csr[3] that will
take up part of the csr code. If there is any question, please
let me know.
Features:
1.Add Nuclei CSR support in eclic mode
2.Add ECLIC Device
3.Add Systimer Device
4.Add Uart Device
5.Add Nuclei FPGA Machine
It have passed Nuclei SDK[4](not include dsp) and RTThread[5] HBird BSP
Test.
Any comments are welcome.Thanks
wangjunqiang
[1] https://doc.nucleisys.com/nuclei_sdk/design/board/nuclei_fpga_eval.html
[2] https://doc.nucleisys.com/nuclei_spec/isa/eclic.html
[3] https://doc.nucleisys.com/nuclei_spec/isa/core_csr.html
[4] https://github.com/Nuclei-Software/nuclei-sdk.git
[5] https://github.com/RT-Thread/rt-thread
wangjunqiang (5):
target/riscv: Add Nuclei CSR and Update interrupt handling
hw/intc: Add Nuclei ECLIC device
hw/intc: Add Nuclei Systimer
hw/char: Add Nuclei Uart
Nuclei FPGA Evaluation Kit MCU Machine
default-configs/devices/riscv32-softmmu.mak | 1 +
default-configs/devices/riscv64-softmmu.mak | 1 +
hw/char/Kconfig | 3 +
hw/char/meson.build | 1 +
hw/char/nuclei_uart.c | 208 ++++++++++
hw/intc/Kconfig | 6 +
hw/intc/meson.build | 2 +
hw/intc/nuclei_eclic.c | 437 ++++++++++++++++++++
hw/intc/nuclei_systimer.c | 254 ++++++++++++
hw/riscv/Kconfig | 9 +
hw/riscv/meson.build | 1 +
hw/riscv/nuclei_n.c | 276 +++++++++++++
include/hw/char/nuclei_uart.h | 73 ++++
include/hw/intc/nuclei_eclic.h | 115 ++++++
include/hw/intc/nuclei_systimer.h | 70 ++++
include/hw/riscv/nuclei_n.h | 136 ++++++
target/riscv/cpu.c | 25 +-
target/riscv/cpu.h | 42 +-
target/riscv/cpu_bits.h | 37 ++
target/riscv/cpu_helper.c | 80 +++-
target/riscv/csr.c | 347 +++++++++++++++-
target/riscv/insn_trans/trans_rvi.c.inc | 16 +-
target/riscv/op_helper.c | 14 +
23 files changed, 2145 insertions(+), 9 deletions(-)
create mode 100644 hw/char/nuclei_uart.c
create mode 100644 hw/intc/nuclei_eclic.c
create mode 100644 hw/intc/nuclei_systimer.c
create mode 100644 hw/riscv/nuclei_n.c
create mode 100644 include/hw/char/nuclei_uart.h
create mode 100644 include/hw/intc/nuclei_eclic.h
create mode 100644 include/hw/intc/nuclei_systimer.h
create mode 100644 include/hw/riscv/nuclei_n.h
--
2.17.1
- [RFC PATCH 0/5] RISC-V:support Nuclei FPGA Evaluation Kit,
wangjunqiang <=
[RFC PATCH 3/5] hw/intc: Add Nuclei Systimer, wangjunqiang, 2021/05/07
[RFC PATCH 4/5] hw/char: Add Nuclei Uart, wangjunqiang, 2021/05/07
[RFC PATCH 1/5] target/riscv: Add Nuclei CSR and Update interrupt handling, wangjunqiang, 2021/05/07