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[PULL 12/46] target/ppc: Reduce env->hflags to uint32_t
From: |
David Gibson |
Subject: |
[PULL 12/46] target/ppc: Reduce env->hflags to uint32_t |
Date: |
Tue, 4 May 2021 15:52:38 +1000 |
From: Richard Henderson <richard.henderson@linaro.org>
It will be stored in tb->flags, which is also uint32_t,
so let's use the correct size.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210323184340.619757-4-richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
target/ppc/cpu.h | 4 ++--
target/ppc/misc_helper.c | 2 +-
target/ppc/translate.c | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index fe6c3f815d..d5f362506a 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -1129,8 +1129,8 @@ struct CPUPPCState {
bool resume_as_sreset;
#endif
- /* These resources are used only in QEMU core */
- target_ulong hflags;
+ /* These resources are used only in TCG */
+ uint32_t hflags;
target_ulong hflags_compat_nmsr; /* for migration compatibility */
int immu_idx; /* precomputed MMU index to speed up insn accesses */
int dmmu_idx; /* precomputed MMU index to speed up data accesses */
diff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c
index 63e3147eb4..b04b4d7c6e 100644
--- a/target/ppc/misc_helper.c
+++ b/target/ppc/misc_helper.c
@@ -199,7 +199,7 @@ void helper_store_hid0_601(CPUPPCState *env, target_ulong
val)
if ((val ^ hid0) & 0x00000008) {
/* Change current endianness */
hreg_compute_hflags(env);
- qemu_log("%s: set endianness to %c => " TARGET_FMT_lx "\n", __func__,
+ qemu_log("%s: set endianness to %c => %08x\n", __func__,
val & 0x8 ? 'l' : 'b', env->hflags);
}
}
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index a9325a12e5..a85b890bb0 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -7657,7 +7657,7 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f, int flags)
env->nip, env->lr, env->ctr, cpu_read_xer(env),
cs->cpu_index);
qemu_fprintf(f, "MSR " TARGET_FMT_lx " HID0 " TARGET_FMT_lx " HF "
- TARGET_FMT_lx " iidx %d didx %d\n",
+ "%08x iidx %d didx %d\n",
env->msr, env->spr[SPR_HID0],
env->hflags, env->immu_idx, env->dmmu_idx);
#if !defined(NO_TIMER_DUMP)
--
2.31.1
- [PULL 00/46] ppc-for-6.1 queue 20210504, David Gibson, 2021/05/04
- [PULL 01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB, David Gibson, 2021/05/04
- [PULL 03/46] target/ppc: Move 601 hflags adjustment to hreg_compute_hflags, David Gibson, 2021/05/04
- [PULL 04/46] target/ppc: Properly sync cpu state with new msr in cpu_load_old, David Gibson, 2021/05/04
- [PULL 02/46] target/ppc: Move helper_regs.h functions out-of-line, David Gibson, 2021/05/04
- [PULL 06/46] target/ppc: Retain hflags_nmsr only for migration, David Gibson, 2021/05/04
- [PULL 05/46] target/ppc: Do not call hreg_compute_mem_idx after ppc_store_msr, David Gibson, 2021/05/04
- [PULL 12/46] target/ppc: Reduce env->hflags to uint32_t,
David Gibson <=
- [PULL 08/46] hw/ppc/pnv_core: Update hflags after setting msr, David Gibson, 2021/05/04
- [PULL 07/46] target/ppc: Fix comment for MSR_FE{0,1}, David Gibson, 2021/05/04
- [PULL 10/46] target/ppc: Extract post_load_update_msr, David Gibson, 2021/05/04
- [PULL 09/46] hw/ppc/spapr_rtas: Update hflags after setting msr, David Gibson, 2021/05/04
- [PULL 11/46] target/ppc: Disconnect hflags from MSR, David Gibson, 2021/05/04
- [PULL 14/46] target/ppc: Create helper_scv, David Gibson, 2021/05/04
- [PULL 15/46] target/ppc: Put LPCR[GTSE] in hflags, David Gibson, 2021/05/04
- [PULL 16/46] target/ppc: Remove MSR_SA and MSR_AP from hflags, David Gibson, 2021/05/04
- [PULL 18/46] linux-user/ppc: Fix msr updates for signal handling, David Gibson, 2021/05/04
- [PULL 20/46] vt82c686: QOM-ify superio related functionality, David Gibson, 2021/05/04