[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v3 07/30] target/ppc: Move DISAS_NORETURN setting into gen_except
From: |
Richard Henderson |
Subject: |
[PATCH v3 07/30] target/ppc: Move DISAS_NORETURN setting into gen_exception* |
Date: |
Thu, 29 Apr 2021 18:15:20 -0700 |
There are other valid settings for is_jmp besides
DISAS_NEXT and DISAS_NORETURN, so eliminating that
dichotomy from ppc_tr_translate_insn is helpful.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
v3: Retain an exit from translator loop for ctx->exception.
Do not emit code for single-step or ppc_tr_tb_stop for NORETURN.
---
target/ppc/translate.c | 26 ++++++++++++++++++--------
1 file changed, 18 insertions(+), 8 deletions(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index ebe5afe7ae..3607cc12f3 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -262,7 +262,8 @@ static void gen_exception_err(DisasContext *ctx, uint32_t
excp, uint32_t error)
gen_helper_raise_exception_err(cpu_env, t0, t1);
tcg_temp_free_i32(t0);
tcg_temp_free_i32(t1);
- ctx->exception = (excp);
+ ctx->exception = excp;
+ ctx->base.is_jmp = DISAS_NORETURN;
}
static void gen_exception(DisasContext *ctx, uint32_t excp)
@@ -279,7 +280,8 @@ static void gen_exception(DisasContext *ctx, uint32_t excp)
t0 = tcg_const_i32(excp);
gen_helper_raise_exception(cpu_env, t0);
tcg_temp_free_i32(t0);
- ctx->exception = (excp);
+ ctx->exception = excp;
+ ctx->base.is_jmp = DISAS_NORETURN;
}
static void gen_exception_nip(DisasContext *ctx, uint32_t excp,
@@ -291,7 +293,8 @@ static void gen_exception_nip(DisasContext *ctx, uint32_t
excp,
t0 = tcg_const_i32(excp);
gen_helper_raise_exception(cpu_env, t0);
tcg_temp_free_i32(t0);
- ctx->exception = (excp);
+ ctx->exception = excp;
+ ctx->base.is_jmp = DISAS_NORETURN;
}
/*
@@ -337,6 +340,7 @@ static void gen_debug_exception(DisasContext *ctx)
t0 = tcg_const_i32(EXCP_DEBUG);
gen_helper_raise_exception(cpu_env, t0);
tcg_temp_free_i32(t0);
+ ctx->base.is_jmp = DISAS_NORETURN;
}
static inline void gen_inval_exception(DisasContext *ctx, uint32_t error)
@@ -8037,7 +8041,6 @@ static bool ppc_tr_breakpoint_check(DisasContextBase
*dcbase, CPUState *cs,
DisasContext *ctx = container_of(dcbase, DisasContext, base);
gen_debug_exception(ctx);
- dcbase->is_jmp = DISAS_NORETURN;
/*
* The address covered by the breakpoint must be included in
* [tb->pc, tb->pc + tb->size) in order to for it to be properly
@@ -8067,18 +8070,19 @@ static void ppc_tr_translate_insn(DisasContextBase
*dcbase, CPUState *cs)
ok = decode_legacy(cpu, ctx, insn);
if (!ok) {
gen_invalid(ctx);
- ctx->base.is_jmp = DISAS_NORETURN;
}
#if defined(DO_PPC_STATISTICS)
handler->count++;
#endif
+
/* Check trace mode exceptions */
if (unlikely(ctx->singlestep_enabled & CPU_SINGLE_STEP &&
(ctx->base.pc_next <= 0x100 || ctx->base.pc_next > 0xF00) &&
ctx->exception != POWERPC_SYSCALL &&
ctx->exception != POWERPC_EXCP_TRAP &&
- ctx->exception != POWERPC_EXCP_BRANCH)) {
+ ctx->exception != POWERPC_EXCP_BRANCH &&
+ ctx->base.is_jmp != DISAS_NORETURN)) {
uint32_t excp = gen_prep_dbgex(ctx);
gen_exception_nip(ctx, excp, ctx->base.pc_next);
}
@@ -8089,14 +8093,20 @@ static void ppc_tr_translate_insn(DisasContextBase
*dcbase, CPUState *cs)
opc3(ctx->opcode), opc4(ctx->opcode), ctx->opcode);
}
- ctx->base.is_jmp = ctx->exception == POWERPC_EXCP_NONE ?
- DISAS_NEXT : DISAS_NORETURN;
+ if (ctx->base.is_jmp == DISAS_NEXT
+ && ctx->exception != POWERPC_EXCP_NONE) {
+ ctx->base.is_jmp = DISAS_TOO_MANY;
+ }
}
static void ppc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
{
DisasContext *ctx = container_of(dcbase, DisasContext, base);
+ if (ctx->base.is_jmp == DISAS_NORETURN) {
+ return;
+ }
+
if (ctx->exception == POWERPC_EXCP_NONE) {
gen_goto_tb(ctx, 0, ctx->base.pc_next);
} else if (ctx->exception != POWERPC_EXCP_BRANCH) {
--
2.25.1
- [PATCH v3 04/30] decodetree: Extend argument set syntax to allow types, (continued)
- [PATCH v3 04/30] decodetree: Extend argument set syntax to allow types, Richard Henderson, 2021/04/29
- [PATCH v3 05/30] target/ppc: Add cia field to DisasContext, Richard Henderson, 2021/04/29
- [PATCH v3 03/30] decodetree: Add support for 64-bit instructions, Richard Henderson, 2021/04/29
- [PATCH v3 02/30] decodetree: More use of f-strings, Richard Henderson, 2021/04/29
- [PATCH v3 08/30] target/ppc: Remove special case for POWERPC_SYSCALL, Richard Henderson, 2021/04/29
- [PATCH v3 10/30] target/ppc: Simplify gen_debug_exception, Richard Henderson, 2021/04/29
- [PATCH v3 12/30] target/ppc: Replace POWERPC_EXCP_SYNC with DISAS_EXIT, Richard Henderson, 2021/04/29
- [PATCH v3 06/30] target/ppc: Split out decode_legacy, Richard Henderson, 2021/04/29
- [PATCH v3 09/30] target/ppc: Remove special case for POWERPC_EXCP_TRAP, Richard Henderson, 2021/04/29
- [PATCH v3 14/30] target/ppc: Introduce gen_icount_io_start, Richard Henderson, 2021/04/29
- [PATCH v3 07/30] target/ppc: Move DISAS_NORETURN setting into gen_exception*,
Richard Henderson <=
- [PATCH v3 18/30] target/ppc: Move single-step check to ppc_tr_tb_stop, Richard Henderson, 2021/04/29
- [PATCH v3 15/30] target/ppc: Replace POWERPC_EXCP_STOP with DISAS_EXIT_UPDATE, Richard Henderson, 2021/04/29
- [PATCH v3 11/30] target/ppc: Introduce DISAS_{EXIT,CHAIN}{,_UPDATE}, Richard Henderson, 2021/04/29
- [PATCH v3 16/30] target/ppc: Replace POWERPC_EXCP_BRANCH with DISAS_NORETURN, Richard Henderson, 2021/04/29
- [PATCH v3 17/30] target/ppc: Remove DisasContext.exception, Richard Henderson, 2021/04/29
- [PATCH v3 19/30] target/ppc: Tidy exception vs exit_tb, Richard Henderson, 2021/04/29
- [PATCH v3 13/30] target/ppc: Remove unnecessary gen_io_end calls, Richard Henderson, 2021/04/29
- [PATCH v3 21/30] target/ppc: Use translator_loop_temp_check, Richard Henderson, 2021/04/29
- [PATCH v3 20/30] target/ppc: Mark helper_raise_exception* as noreturn, Richard Henderson, 2021/04/29