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[PATCH v3 03/30] decodetree: Add support for 64-bit instructions
From: |
Richard Henderson |
Subject: |
[PATCH v3 03/30] decodetree: Add support for 64-bit instructions |
Date: |
Thu, 29 Apr 2021 18:15:16 -0700 |
From: Luis Fernando Fujita Pires <luis.pires@eldorado.org.br>
Allow '64' to be specified for the instruction width command line params
and use the appropriate extract and deposit functions in that case.
This will be used to implement the new 64-bit Power ISA 3.1 instructions.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
Message-Id:
<CP2PR80MB3668E123E2EFDB0ACD3A46F1DA759@CP2PR80MB3668.lamprd80.prod.outlook.com>
[rth: Drop the change to the field type; use bitop_width instead of separate
variables for extract/deposit; use "ull" for 64-bit constants.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
scripts/decodetree.py | 21 ++++++++++++++-------
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/scripts/decodetree.py b/scripts/decodetree.py
index d5da101167..f85da45ee3 100644
--- a/scripts/decodetree.py
+++ b/scripts/decodetree.py
@@ -27,6 +27,7 @@
import getopt
insnwidth = 32
+bitop_width = 32
insnmask = 0xffffffff
variablewidth = False
fields = {}
@@ -112,7 +113,9 @@ def whexC(val):
"""Return a hex string for val padded for insnwidth,
and with the proper suffix for a C constant."""
suffix = ''
- if val >= 0x80000000:
+ if val >= 0x100000000:
+ suffix = 'ull'
+ elif val >= 0x80000000:
suffix = 'u'
return whex(val) + suffix
@@ -199,11 +202,9 @@ def __str__(self):
return str(self.pos) + ':' + s + str(self.len)
def str_extract(self):
- if self.sign:
- extr = 'sextract32'
- else:
- extr = 'extract32'
- return f'{extr}(insn, {self.pos}, {self.len})'
+ global bitop_width
+ s = 's' if self.sign else ''
+ return f'{s}extract{bitop_width}(insn, {self.pos}, {self.len})'
def __eq__(self, other):
return self.sign == other.sign and self.mask == other.mask
@@ -224,6 +225,7 @@ def __str__(self):
return str(self.subs)
def str_extract(self):
+ global bitop_width
ret = '0'
pos = 0
for f in reversed(self.subs):
@@ -231,7 +233,7 @@ def str_extract(self):
if pos == 0:
ret = ext
else:
- ret = f'deposit32({ret}, {pos}, {32 - pos}, {ext})'
+ ret = f'deposit{bitop_width}({ret}, {pos}, {bitop_width -
pos}, {ext})'
pos += f.len
return ret
@@ -1270,6 +1272,7 @@ def main():
global insntype
global insnmask
global decode_function
+ global bitop_width
global variablewidth
global anyextern
@@ -1299,6 +1302,10 @@ def main():
if insnwidth == 16:
insntype = 'uint16_t'
insnmask = 0xffff
+ elif insnwidth == 64:
+ insntype = 'uint64_t'
+ insnmask = 0xffffffffffffffff
+ bitop_width = 64
elif insnwidth != 32:
error(0, 'cannot handle insns of width', insnwidth)
else:
--
2.25.1
- [PATCH v3 00/30] Base for adding PowerPC 64-bit instructions, Richard Henderson, 2021/04/29
- [PATCH v3 01/30] decodetree: Introduce whex and whexC helpers, Richard Henderson, 2021/04/29
- [PATCH v3 04/30] decodetree: Extend argument set syntax to allow types, Richard Henderson, 2021/04/29
- [PATCH v3 05/30] target/ppc: Add cia field to DisasContext, Richard Henderson, 2021/04/29
- [PATCH v3 03/30] decodetree: Add support for 64-bit instructions,
Richard Henderson <=
- [PATCH v3 02/30] decodetree: More use of f-strings, Richard Henderson, 2021/04/29
- [PATCH v3 08/30] target/ppc: Remove special case for POWERPC_SYSCALL, Richard Henderson, 2021/04/29
- [PATCH v3 10/30] target/ppc: Simplify gen_debug_exception, Richard Henderson, 2021/04/29
- [PATCH v3 12/30] target/ppc: Replace POWERPC_EXCP_SYNC with DISAS_EXIT, Richard Henderson, 2021/04/29
- [PATCH v3 06/30] target/ppc: Split out decode_legacy, Richard Henderson, 2021/04/29
- [PATCH v3 09/30] target/ppc: Remove special case for POWERPC_EXCP_TRAP, Richard Henderson, 2021/04/29
- [PATCH v3 14/30] target/ppc: Introduce gen_icount_io_start, Richard Henderson, 2021/04/29