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[PATCH v3 07/30] target/mips: Turn printfpr() macro into a proper functi
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From: |
Philippe Mathieu-Daudé |
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Subject: |
[PATCH v3 07/30] target/mips: Turn printfpr() macro into a proper function |
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Date: |
Mon, 19 Apr 2021 21:18:00 +0200 |
Turn printfpr() macro into a proper function: fpu_dump_fpr().
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/mips/cpu.c | 48 ++++++++++++++++++++++-------------------------
1 file changed, 22 insertions(+), 26 deletions(-)
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index 232f701b836..90ae232c8b8 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -145,44 +145,40 @@ void cpu_mips_store_cause(CPUMIPSState *env, target_ulong
val)
#endif /* !CONFIG_USER_ONLY */
+static void fpu_dump_fpr(fpr_t *fpr, FILE *f, bool is_fpu64)
+{
+ if (is_fpu64) {
+ qemu_fprintf(f, "w:%08x d:%016" PRIx64 " fd:%13g fs:%13g psu: %13g\n",
+ fpr->w[FP_ENDIAN_IDX], fpr->d,
+ (double)fpr->fd,
+ (double)fpr->fs[FP_ENDIAN_IDX],
+ (double)fpr->fs[!FP_ENDIAN_IDX]);
+ } else {
+ fpr_t tmp;
+
+ tmp.w[FP_ENDIAN_IDX] = fpr->w[FP_ENDIAN_IDX];
+ tmp.w[!FP_ENDIAN_IDX] = (fpr + 1)->w[FP_ENDIAN_IDX];
+ qemu_fprintf(f, "w:%08x d:%016" PRIx64 " fd:%13g fs:%13g psu:%13g\n",
+ tmp.w[FP_ENDIAN_IDX], tmp.d,
+ (double)tmp.fd,
+ (double)tmp.fs[FP_ENDIAN_IDX],
+ (double)tmp.fs[!FP_ENDIAN_IDX]);
+ }
+}
+
static void fpu_dump_state(CPUMIPSState *env, FILE *f, int flags)
{
int i;
int is_fpu64 = !!(env->hflags & MIPS_HFLAG_F64);
-#define printfpr(fp) \
- do { \
- if (is_fpu64) \
- qemu_fprintf(f, "w:%08x d:%016" PRIx64 \
- " fd:%13g fs:%13g psu: %13g\n", \
- (fp)->w[FP_ENDIAN_IDX], (fp)->d, \
- (double)(fp)->fd, \
- (double)(fp)->fs[FP_ENDIAN_IDX], \
- (double)(fp)->fs[!FP_ENDIAN_IDX]); \
- else { \
- fpr_t tmp; \
- tmp.w[FP_ENDIAN_IDX] = (fp)->w[FP_ENDIAN_IDX]; \
- tmp.w[!FP_ENDIAN_IDX] = ((fp) + 1)->w[FP_ENDIAN_IDX]; \
- qemu_fprintf(f, "w:%08x d:%016" PRIx64 \
- " fd:%13g fs:%13g psu:%13g\n", \
- tmp.w[FP_ENDIAN_IDX], tmp.d, \
- (double)tmp.fd, \
- (double)tmp.fs[FP_ENDIAN_IDX], \
- (double)tmp.fs[!FP_ENDIAN_IDX]); \
- } \
- } while (0)
-
-
qemu_fprintf(f,
"CP1 FCR0 0x%08x FCR31 0x%08x SR.FR %d fp_status 0x%02x\n",
env->active_fpu.fcr0, env->active_fpu.fcr31, is_fpu64,
get_float_exception_flags(&env->active_fpu.fp_status));
for (i = 0; i < 32; (is_fpu64) ? i++ : (i += 2)) {
qemu_fprintf(f, "%3s: ", fregnames[i]);
- printfpr(&env->active_fpu.fpr[i]);
+ fpu_dump_fpr(&env->active_fpu.fpr[i], f, is_fpu64);
}
-
-#undef printfpr
}
static void mips_cpu_dump_state(CPUState *cs, FILE *f, int flags)
--
2.26.3
- [PATCH v3 00/30] target/mips: Re-org to allow KVM-only builds, Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 01/30] target/mips: Simplify meson TCG rules, Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 02/30] target/mips: Move IEEE rounding mode array to new source file, Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 03/30] target/mips: Move msa_reset() to new source file, Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 04/30] target/mips: Make CPU/FPU regnames[] arrays global, Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 05/30] target/mips: Optimize CPU/FPU regnames[] arrays, Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 06/30] target/mips: Restrict mips_cpu_dump_state() to cpu.c, Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 07/30] target/mips: Turn printfpr() macro into a proper function,
Philippe Mathieu-Daudé <=
- [PATCH v3 08/30] target/mips: Declare mips_cpu_set_error_pc() inlined in "internal.h", Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 09/30] target/mips: Merge do_translate_address into cpu_mips_translate_address, Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 10/30] target/mips: Extract load/store helpers to ldst_helper.c, Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 11/30] meson: Introduce meson_user_arch source set for arch-specific user-mode, Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 12/30] target/mips: Introduce tcg-internal.h for TCG specific declarations, Philippe Mathieu-Daudé, 2021/04/19