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[PATCH v2 04/29] target/mips: Make CPU/FPU regnames[] arrays global
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From: |
Philippe Mathieu-Daudé |
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Subject: |
[PATCH v2 04/29] target/mips: Make CPU/FPU regnames[] arrays global |
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Date: |
Mon, 19 Apr 2021 00:50:33 +0200 |
The CPU/FPU regnames[] arrays is used in mips_tcg_init() and
mips_cpu_dump_state(), which while being in translate.c is
not specific to TCG.
To be able to move mips_cpu_dump_state() to cpu.c, which is
compiled for all accelerator, we need to make the regnames[]
arrays global to target/mips/ by declaring them in "internal.h".
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/mips/internal.h | 3 +++
target/mips/cpu.c | 7 +++++++
target/mips/fpu.c | 7 +++++++
target/mips/translate.c | 14 --------------
4 files changed, 17 insertions(+), 14 deletions(-)
diff --git a/target/mips/internal.h b/target/mips/internal.h
index 99264b8bf6a..a8644f754a6 100644
--- a/target/mips/internal.h
+++ b/target/mips/internal.h
@@ -71,6 +71,9 @@ struct mips_def_t {
int32_t SAARP;
};
+extern const char * const regnames[32];
+extern const char * const fregnames[32];
+
extern const struct mips_def_t mips_defs[];
extern const int mips_defs_number;
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index dce1e166bde..f354d18aec4 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -35,6 +35,13 @@
#include "qapi/qapi-commands-machine-target.h"
#include "fpu_helper.h"
+const char * const regnames[32] = {
+ "r0", "at", "v0", "v1", "a0", "a1", "a2", "a3",
+ "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
+ "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
+ "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra",
+};
+
#if !defined(CONFIG_USER_ONLY)
/* Called for updates to CP0_Status. */
diff --git a/target/mips/fpu.c b/target/mips/fpu.c
index 39a2f7fd22e..1447dba3fa3 100644
--- a/target/mips/fpu.c
+++ b/target/mips/fpu.c
@@ -16,3 +16,10 @@ const FloatRoundMode ieee_rm[4] = {
float_round_up,
float_round_down
};
+
+const char * const fregnames[32] = {
+ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
+ "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
+ "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
+ "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
+};
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 71fa5ec1973..f99d4d4016d 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -1267,13 +1267,6 @@ TCGv_i64 fpu_f64[32];
#define DISAS_STOP DISAS_TARGET_0
#define DISAS_EXIT DISAS_TARGET_1
-static const char * const regnames[] = {
- "r0", "at", "v0", "v1", "a0", "a1", "a2", "a3",
- "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
- "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
- "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra",
-};
-
static const char * const regnames_HI[] = {
"HI0", "HI1", "HI2", "HI3",
};
@@ -1282,13 +1275,6 @@ static const char * const regnames_LO[] = {
"LO0", "LO1", "LO2", "LO3",
};
-static const char * const fregnames[] = {
- "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
- "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
- "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
- "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
-};
-
/* General purpose registers moves. */
void gen_load_gpr(TCGv t, int reg)
{
--
2.26.3
- [PATCH v2 00/29] target/mips: Re-org to allow KVM-only builds, Philippe Mathieu-Daudé, 2021/04/18
- [PATCH v2 01/29] target/mips: Simplify meson TCG rules, Philippe Mathieu-Daudé, 2021/04/18
- [PATCH v2 02/29] target/mips: Move IEEE rounding mode array to new source file, Philippe Mathieu-Daudé, 2021/04/18
- [PATCH v2 03/29] target/mips: Move msa_reset() to new source file, Philippe Mathieu-Daudé, 2021/04/18
- [PATCH v2 04/29] target/mips: Make CPU/FPU regnames[] arrays global,
Philippe Mathieu-Daudé <=
- [PATCH v2 05/29] target/mips: Optimize CPU/FPU regnames[] arrays, Philippe Mathieu-Daudé, 2021/04/18
- [PATCH v2 06/29] target/mips: Restrict mips_cpu_dump_state() to cpu.c, Philippe Mathieu-Daudé, 2021/04/18
- [PATCH v2 07/29] target/mips: Turn printfpr() macro into a proper function, Philippe Mathieu-Daudé, 2021/04/18
- [PATCH v2 08/29] target/mips: Declare mips_cpu_set_error_pc() inlined in "internal.h", Philippe Mathieu-Daudé, 2021/04/18
- [PATCH v2 09/29] target/mips: Extract load/store helpers to ldst_helper.c, Philippe Mathieu-Daudé, 2021/04/18
- [PATCH v2 10/29] meson: Introduce meson_user_arch source set for arch-specific user-mode, Philippe Mathieu-Daudé, 2021/04/18
- [PATCH v2 11/29] target/mips: Introduce tcg-internal.h for TCG specific declarations, Philippe Mathieu-Daudé, 2021/04/18
- [PATCH v2 12/29] target/mips: Add simple user-mode mips_cpu_do_interrupt(), Philippe Mathieu-Daudé, 2021/04/18
- [PATCH v2 13/29] target/mips: Add simple user-mode mips_cpu_tlb_fill(), Philippe Mathieu-Daudé, 2021/04/18
- [PATCH v2 14/29] target/mips: Move cpu_signal_handler definition around, Philippe Mathieu-Daudé, 2021/04/18