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[PULL 7/7] accel/tcg: avoid re-translating one-shot instructions
From: |
Peter Maydell |
Subject: |
[PULL 7/7] accel/tcg: avoid re-translating one-shot instructions |
Date: |
Sat, 17 Apr 2021 20:42:05 +0100 |
From: Alex Bennée <alex.bennee@linaro.org>
By definition a single instruction is capable of being an IO
instruction. This avoids a problem of triggering a cpu_io_recompile on
a non-recorded translation which then fails because it expects
tcg_tb_lookup() to succeed unconditionally. The normal use case
requires a TB to be able to resolve machine state.
The other users of tcg_tb_lookup() are able to tolerate a missing TB
if the machine state has been resolved by other means - which in the
single-shot case is always true because machine state is synced at the
start of a block.
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210415162454.22056-1-alex.bennee@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
accel/tcg/translate-all.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index ba6ab09790e..b12d0898d0a 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -1863,7 +1863,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
if (phys_pc == -1) {
/* Generate a one-shot TB with 1 insn in it */
- cflags = (cflags & ~CF_COUNT_MASK) | 1;
+ cflags = (cflags & ~CF_COUNT_MASK) | CF_LAST_IO | 1;
}
max_insns = cflags & CF_COUNT_MASK;
--
2.20.1
- [PULL 0/7] queue of proposed rc4 fixes, Peter Maydell, 2021/04/17
- [PULL 1/7] osdep: include glib-compat.h before other QEMU headers, Peter Maydell, 2021/04/17
- [PULL 2/7] osdep: protect qemu/osdep.h with extern "C", Peter Maydell, 2021/04/17
- [PULL 4/7] hw/arm/armsse: Give SSE-300 its own Property array, Peter Maydell, 2021/04/17
- [PULL 3/7] include/qemu/osdep.h: Move system includes to top, Peter Maydell, 2021/04/17
- [PULL 5/7] hw/arm/armsse: Make SSE-300 use Cortex-M55, Peter Maydell, 2021/04/17
- [PULL 6/7] target/arm: drop CF_LAST_IO/dc->condjump check, Peter Maydell, 2021/04/17
- [PULL 7/7] accel/tcg: avoid re-translating one-shot instructions,
Peter Maydell <=
- Re: [PULL 0/7] queue of proposed rc4 fixes, no-reply, 2021/04/17
- Re: [PULL 0/7] queue of proposed rc4 fixes, Philippe Mathieu-Daudé, 2021/04/18
- Re: [PULL 0/7] queue of proposed rc4 fixes, Alex Bennée, 2021/04/18
- Re: [PULL 0/7] queue of proposed rc4 fixes, Thomas Huth, 2021/04/19
- Re: [PULL 0/7] queue of proposed rc4 fixes, Peter Maydell, 2021/04/19