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[PATCH v7 0/4] Add support for FEAT_TLBIOS and FEAT_TLBIRANGE
From: |
Rebecca Cran |
Subject: |
[PATCH v7 0/4] Add support for FEAT_TLBIOS and FEAT_TLBIRANGE |
Date: |
Wed, 14 Apr 2021 14:32:27 -0600 |
ARMv8.4 adds the mandatory FEAT_TLBIOS and FEAT_TLBIRANGE.
They provides TLBI maintenance instructions that extend to the Outer
Shareable domain and that apply to a range of input addresses.
Changes from v6 to v7:
o Fixed the tlbi_aa64_rvae1_write the tlbi_aa64_rvae1is_write functions
to pass the correct value into functions which use an ARMMMUIdx.
o Fixed comments in helper.c which referred to non-existent instructions.
Testing:
o Booted Linux 5.11 - verified the previous assert failure in qemu is
resolved.
o Ran checkpatch.pl.
Rebecca Cran (4):
accel/tcg: Add TLB invalidation support for ranges of addresses
target/arm: Add support for FEAT_TLBIRANGE
target/arm: Add support for FEAT_TLBIOS
target/arm: set ID_AA64ISAR0.TLB to 2 for max AARCH64 CPU type
accel/tcg/cputlb.c | 130 ++++++-
include/exec/exec-all.h | 46 +++
target/arm/cpu.h | 10 +
target/arm/cpu64.c | 1 +
target/arm/helper.c | 371 ++++++++++++++++++++
5 files changed, 555 insertions(+), 3 deletions(-)
--
2.26.2
- [PATCH v7 0/4] Add support for FEAT_TLBIOS and FEAT_TLBIRANGE,
Rebecca Cran <=
- [PATCH v7 1/4] accel/tcg: Add TLB invalidation support for ranges of addresses, Rebecca Cran, 2021/04/14
- [PATCH v7 2/4] target/arm: Add support for FEAT_TLBIRANGE, Rebecca Cran, 2021/04/14
- [PATCH v7 4/4] target/arm: set ID_AA64ISAR0.TLB to 2 for max AARCH64 CPU type, Rebecca Cran, 2021/04/14
- [PATCH v7 3/4] target/arm: Add support for FEAT_TLBIOS, Rebecca Cran, 2021/04/14
- Re: [PATCH v7 0/4] Add support for FEAT_TLBIOS and FEAT_TLBIRANGE, Rebecca Cran, 2021/04/19