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[RFC v13 32/80] target/arm: fix comments style of fp_exception_el before
From: |
Claudio Fontana |
Subject: |
[RFC v13 32/80] target/arm: fix comments style of fp_exception_el before moving it |
Date: |
Wed, 14 Apr 2021 13:26:02 +0200 |
Signed-off-by: Claudio Fontana <cfontana@suse.de>
---
target/arm/tcg/helper.c | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/target/arm/tcg/helper.c b/target/arm/tcg/helper.c
index aaa307daca..4e027b98fe 100644
--- a/target/arm/tcg/helper.c
+++ b/target/arm/tcg/helper.c
@@ -1625,13 +1625,15 @@ uint32_t HELPER(crc32c)(uint32_t acc, uint32_t val,
uint32_t bytes)
return crc32c(acc, buf, bytes) ^ 0xffffffff;
}
-/* Return the exception level to which FP-disabled exceptions should
+/*
+ * Return the exception level to which FP-disabled exceptions should
* be taken, or 0 if FP is enabled.
*/
int fp_exception_el(CPUARMState *env, int cur_el)
{
#ifndef CONFIG_USER_ONLY
- /* CPACR and the CPTR registers don't exist before v6, so FP is
+ /*
+ * CPACR and the CPTR registers don't exist before v6, so FP is
* always accessible
*/
if (!arm_feature(env, ARM_FEATURE_V6)) {
@@ -1654,7 +1656,8 @@ int fp_exception_el(CPUARMState *env, int cur_el)
return 0;
}
- /* The CPACR controls traps to EL1, or PL1 if we're 32 bit:
+ /*
+ * The CPACR controls traps to EL1, or PL1 if we're 32 bit:
* 0, 2 : trap EL0 and EL1/PL1 accesses
* 1 : trap only EL0 accesses
* 3 : trap no accesses
@@ -1701,7 +1704,8 @@ int fp_exception_el(CPUARMState *env, int cur_el)
}
}
- /* For the CPTR registers we don't need to guard with an ARM_FEATURE
+ /*
+ * For the CPTR registers we don't need to guard with an ARM_FEATURE
* check because zero bits in the registers mean "don't trap".
*/
--
2.26.2
- [RFC v13 42/80] target/arm: wrap call to aarch64_sve_change_el in tcg_enabled(), (continued)
- [RFC v13 42/80] target/arm: wrap call to aarch64_sve_change_el in tcg_enabled(), Claudio Fontana, 2021/04/14
- [RFC v13 40/80] target/arm: move TCGCPUOps to tcg/tcg-cpu.c, Claudio Fontana, 2021/04/14
- [RFC v13 39/80] target/arm: replace CONFIG_TCG with tcg_enabled, Claudio Fontana, 2021/04/14
- [RFC v13 44/80] target/arm: move kvm-const.h, kvm.c, kvm64.c, kvm_arm.h to kvm/, Claudio Fontana, 2021/04/14
- [RFC v13 26/80] target/arm: move aarch64_sync_32_to_64 (and vv) to cpu code, Claudio Fontana, 2021/04/14
- [RFC v13 35/80] target/arm: make further preparation for the exception code to move, Claudio Fontana, 2021/04/14
- [RFC v13 43/80] target/arm: remove kvm include file for PSCI and arm-powerctl, Claudio Fontana, 2021/04/14
- [RFC v13 46/80] target/arm: cleanup cpu includes, Claudio Fontana, 2021/04/14
- [RFC v13 48/80] target/arm: remove kvm-stub.c, Claudio Fontana, 2021/04/14
- [RFC v13 30/80] target/arm: fixup sve_exception_el code style before move, Claudio Fontana, 2021/04/14
- [RFC v13 32/80] target/arm: fix comments style of fp_exception_el before moving it,
Claudio Fontana <=
- [RFC v13 38/80] target/arm: rename handle_semihosting to tcg_handle_semihosting, Claudio Fontana, 2021/04/14
- [RFC v13 45/80] MAINTAINERS: update arm kvm maintained files to all in target/arm/kvm/, Claudio Fontana, 2021/04/14
- [RFC v13 37/80] target/arm: move exception code out of tcg/helper.c, Claudio Fontana, 2021/04/14
- [RFC v13 51/80] tests: do not run test-hmp on all machines for ARM KVM-only, Claudio Fontana, 2021/04/14
- [RFC v13 47/80] target/arm: remove broad "else" statements when checking accels, Claudio Fontana, 2021/04/14
- [RFC v13 49/80] tests/qtest: skip bios-tables-test test_acpi_oem_fields_virt for KVM, Claudio Fontana, 2021/04/14
- [RFC v13 50/80] tests: restrict TCG-only arm-cpu-features tests to TCG builds, Claudio Fontana, 2021/04/14
- [RFC v13 34/80] target/arm: remove now useless ifndef from fp_exception_el, Claudio Fontana, 2021/04/14
- [RFC v13 29/80] target/arm: move a15 cpu model away from the TCG-only models, Claudio Fontana, 2021/04/14
- [RFC v13 41/80] target/arm: move cpu_tcg to tcg/tcg-cpu-models.c, Claudio Fontana, 2021/04/14