[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH 7/8] hw/riscv: Use macros for BIOS image names
From: |
Alistair Francis |
Subject: |
Re: [PATCH 7/8] hw/riscv: Use macros for BIOS image names |
Date: |
Wed, 31 Mar 2021 11:44:57 -0400 |
On Mon, Mar 29, 2021 at 1:20 PM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> From: Bin Meng <bin.meng@windriver.com>
>
> The OpenSBI BIOS image names are used by many RISC-V machines.
> Let's define macros for them.
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
>
> include/hw/riscv/boot.h | 5 +++++
> hw/riscv/sifive_u.c | 6 ++----
> hw/riscv/spike.c | 6 ++----
> hw/riscv/virt.c | 6 ++----
> 4 files changed, 11 insertions(+), 12 deletions(-)
>
> diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h
> index 11a21dd584..0e89400b09 100644
> --- a/include/hw/riscv/boot.h
> +++ b/include/hw/riscv/boot.h
> @@ -24,6 +24,11 @@
> #include "hw/loader.h"
> #include "hw/riscv/riscv_hart.h"
>
> +#define RISCV32_BIOS_BIN "opensbi-riscv32-generic-fw_dynamic.bin"
> +#define RISCV32_BIOS_ELF "opensbi-riscv32-generic-fw_dynamic.elf"
> +#define RISCV64_BIOS_BIN "opensbi-riscv64-generic-fw_dynamic.bin"
> +#define RISCV64_BIOS_ELF "opensbi-riscv64-generic-fw_dynamic.elf"
> +
> bool riscv_is_32bit(RISCVHartArrayState *harts);
>
> target_ulong riscv_calc_kernel_start_addr(RISCVHartArrayState *harts,
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 651a439528..d484ec3483 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -557,12 +557,10 @@ static void sifive_u_machine_init(MachineState *machine)
>
> if (riscv_is_32bit(&s->soc.u_cpus)) {
> firmware_end_addr = riscv_find_and_load_firmware(machine,
> - "opensbi-riscv32-generic-fw_dynamic.bin",
> - start_addr, NULL);
> + RISCV32_BIOS_BIN, start_addr, NULL);
> } else {
> firmware_end_addr = riscv_find_and_load_firmware(machine,
> - "opensbi-riscv64-generic-fw_dynamic.bin",
> - start_addr, NULL);
> + RISCV64_BIOS_BIN, start_addr, NULL);
> }
>
> if (machine->kernel_filename) {
> diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
> index cc33061f23..4f19c8acba 100644
> --- a/hw/riscv/spike.c
> +++ b/hw/riscv/spike.c
> @@ -257,13 +257,11 @@ static void spike_board_init(MachineState *machine)
> */
> if (riscv_is_32bit(&s->soc[0])) {
> firmware_end_addr = riscv_find_and_load_firmware(machine,
> - "opensbi-riscv32-generic-fw_dynamic.elf",
> - memmap[SPIKE_DRAM].base,
> + RISCV32_BIOS_ELF,
> memmap[SPIKE_DRAM].base,
> htif_symbol_callback);
> } else {
> firmware_end_addr = riscv_find_and_load_firmware(machine,
> - "opensbi-riscv64-generic-fw_dynamic.elf",
> - memmap[SPIKE_DRAM].base,
> + RISCV64_BIOS_ELF,
> memmap[SPIKE_DRAM].base,
> htif_symbol_callback);
> }
>
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index d04733d97c..25e845fc78 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -676,12 +676,10 @@ static void virt_machine_init(MachineState *machine)
>
> if (riscv_is_32bit(&s->soc[0])) {
> firmware_end_addr = riscv_find_and_load_firmware(machine,
> - "opensbi-riscv32-generic-fw_dynamic.bin",
> - start_addr, NULL);
> + RISCV32_BIOS_BIN, start_addr, NULL);
> } else {
> firmware_end_addr = riscv_find_and_load_firmware(machine,
> - "opensbi-riscv64-generic-fw_dynamic.bin",
> - start_addr, NULL);
> + RISCV64_BIOS_BIN, start_addr, NULL);
> }
>
> if (machine->kernel_filename) {
> --
> 2.25.1
>
>
- Re: [PATCH 2/8] hw/riscv: virt: Switch to use qemu_fdt_setprop_string_array() helper, (continued)
- [PATCH 3/8] hw/riscv: Support the official CLINT DT bindings, Bin Meng, 2021/03/29
- [PATCH 4/8] hw/riscv: Support the official PLIC DT bindings, Bin Meng, 2021/03/29
- [PATCH 6/8] docs/system/riscv: sifive_u: Document '-dtb' usage, Bin Meng, 2021/03/29
- [PATCH 5/8] docs/system/riscv: Correct the indentation level of supported devices, Bin Meng, 2021/03/29
- [PATCH 7/8] hw/riscv: Use macros for BIOS image names, Bin Meng, 2021/03/29
- Re: [PATCH 7/8] hw/riscv: Use macros for BIOS image names,
Alistair Francis <=
- [PATCH 8/8] hw/riscv: microchip_pfsoc: Support direct kernel boot, Bin Meng, 2021/03/29
- Re: [PATCH 1/8] hw/riscv: sifive_u: Switch to use qemu_fdt_setprop_string_array() helper, Alistair Francis, 2021/03/31
- Re: [PATCH 1/8] hw/riscv: sifive_u: Switch to use qemu_fdt_setprop_string_array() helper, Richard Henderson, 2021/03/31