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[PATCH v1 6/6] tests/i386/test-i386: try and correct constrain 16 bit ca
From: |
Alex Bennée |
Subject: |
[PATCH v1 6/6] tests/i386/test-i386: try and correct constrain 16 bit call (WIP) |
Date: |
Mon, 29 Mar 2021 12:03:03 +0100 |
Newer compilers complain about non-matching constraints:
test-i386.c:1393:5: error: asm operand 2 probably doesn’t match constraints
[-Werror]
1393 | asm volatile ("lcall %1, %2"
| ^~~
It seems the plain "i" immediate constraint is a little too lax here.
What we are actually dealing with is a 32 bit offset into a particular
segment. I think that is "Ts" (Address operand without segment
register).
[AJB: however this just seems to push it a bit further down the road:
test-i386.c:1393: Error: operand type mismatch for `lcall'
Inline ASM constraints are hard :-/]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
tests/tcg/i386/test-i386.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tests/tcg/i386/test-i386.c b/tests/tcg/i386/test-i386.c
index 18d5609665..6d8aeccfb5 100644
--- a/tests/tcg/i386/test-i386.c
+++ b/tests/tcg/i386/test-i386.c
@@ -1392,15 +1392,15 @@ void test_code16(void)
/* call the first function */
asm volatile ("lcall %1, %2"
: "=a" (res)
- : "i" (MK_SEL(1)), "i" (&code16_func1): "memory", "cc");
+ : "i" (MK_SEL(1)), "Ts" (&code16_func1): "memory", "cc");
printf("func1() = 0x%08x\n", res);
asm volatile ("lcall %2, %3"
: "=a" (res), "=c" (res2)
- : "i" (MK_SEL(1)), "i" (&code16_func2): "memory", "cc");
+ : "i" (MK_SEL(1)), "Ts" (&code16_func2): "memory", "cc");
printf("func2() = 0x%08x spdec=%d\n", res, res2);
asm volatile ("lcall %1, %2"
: "=a" (res)
- : "i" (MK_SEL(1)), "i" (&code16_func3): "memory", "cc");
+ : "i" (MK_SEL(1)), "Ts" (&code16_func3): "memory", "cc");
printf("func3() = 0x%08x\n", res);
}
#endif
--
2.20.1
- [PATCH v1 2/6] tests/docker: don't set DOCKER_REGISTRY on non-x86_64, (continued)
Re: [PATCH for 6.0-rc2? v1 0/6] check-tcg for non-x86 hosts, no-reply, 2021/03/29