[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 5/6] hw/ide/via: Connect IDE function output IRQs to the ISA func
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH 5/6] hw/ide/via: Connect IDE function output IRQs to the ISA function input |
Date: |
Wed, 24 Mar 2021 18:54:37 +0100 |
To avoid abusing isa_get_irq(NULL) using a hidden ISA bridge
under the hood, let the IDE function expose 2 output IRQs,
and connect them to the ISA function inputs when creating
the south bridge chipset model in vt82c686b_southbridge_init.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/ide/via.c | 19 +++++++++++++++++--
hw/mips/fuloong2e.c | 9 ++++++++-
2 files changed, 25 insertions(+), 3 deletions(-)
diff --git a/hw/ide/via.c b/hw/ide/via.c
index 6c667a92130..7887bf181e6 100644
--- a/hw/ide/via.c
+++ b/hw/ide/via.c
@@ -33,6 +33,17 @@
#include "hw/ide/pci.h"
#include "trace.h"
+#define TYPE_VIA_IDE "via-ide"
+OBJECT_DECLARE_SIMPLE_TYPE(VIAIDEState, VIA_IDE)
+
+struct VIAIDEState {
+ /* <private> */
+ PCIIDEState parent_obj;
+ /* <public> */
+
+ qemu_irq irq[2];
+};
+
static uint64_t bmdma_read(void *opaque, hwaddr addr,
unsigned size)
{
@@ -105,6 +116,7 @@ static void bmdma_setup_bar(PCIIDEState *d)
static void via_ide_set_irq(void *opaque, int n, int level)
{
PCIDevice *d = PCI_DEVICE(opaque);
+ VIAIDEState *s = VIA_IDE(d);
if (level) {
d->config[0x70 + n * 8] |= 0x80;
@@ -112,7 +124,7 @@ static void via_ide_set_irq(void *opaque, int n, int level)
d->config[0x70 + n * 8] &= ~0x80;
}
- qemu_set_irq(isa_get_irq(NULL, 14 + n), level);
+ qemu_set_irq(s->irq[n], level);
}
static void via_ide_reset(DeviceState *dev)
@@ -159,6 +171,7 @@ static void via_ide_reset(DeviceState *dev)
static void via_ide_realize(PCIDevice *dev, Error **errp)
{
+ VIAIDEState *s = VIA_IDE(dev);
PCIIDEState *d = PCI_IDE(dev);
DeviceState *ds = DEVICE(dev);
uint8_t *pci_conf = dev->config;
@@ -188,6 +201,7 @@ static void via_ide_realize(PCIDevice *dev, Error **errp)
bmdma_setup_bar(d);
pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &d->bmdma_bar);
+ qdev_init_gpio_out_named(ds, s->irq, "ide-irq", ARRAY_SIZE(s->irq));
qdev_init_gpio_in(ds, via_ide_set_irq, ARRAY_SIZE(d->bus));
for (i = 0; i < ARRAY_SIZE(d->bus); i++) {
ide_bus_new(&d->bus[i], sizeof(d->bus[i]), ds, i, MAX_IDE_DEVS);
@@ -227,8 +241,9 @@ static void via_ide_class_init(ObjectClass *klass, void
*data)
}
static const TypeInfo via_ide_info = {
- .name = "via-ide",
+ .name = TYPE_VIA_IDE,
.parent = TYPE_PCI_IDE,
+ .instance_size = sizeof(VIAIDEState),
.class_init = via_ide_class_init,
};
diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
index 931385c760f..f1c5db13b78 100644
--- a/hw/mips/fuloong2e.c
+++ b/hw/mips/fuloong2e.c
@@ -203,12 +203,19 @@ static void vt82c686b_southbridge_init(PCIBus *pci_bus,
int slot, qemu_irq intc,
I2CBus **i2c_bus)
{
PCIDevice *dev;
+ DeviceState *isa;
dev = pci_create_simple_multifunction(pci_bus, PCI_DEVFN(slot, 0), true,
TYPE_VT82C686B_ISA);
- qdev_connect_gpio_out_named(DEVICE(dev), "intr", 0, intc);
+ isa = DEVICE(dev);
+ qdev_connect_gpio_out_named(isa, "intr", 0, intc);
dev = pci_create_simple(pci_bus, PCI_DEVFN(slot, 1), "via-ide");
+ for (unsigned i = 0; i < 2; i++) {
+ qdev_connect_gpio_out_named(DEVICE(dev), "ide-irq", i,
+ qdev_get_gpio_in_named(isa,
+ "isa-irq", 14 + i));
+ }
pci_ide_create_devs(dev);
pci_create_simple(pci_bus, PCI_DEVFN(slot, 2), "vt82c686b-usb-uhci");
--
2.26.2
- [PATCH 0/6] hw/southbridge: QOM'ify vt82c686 as VT82C686B_SOUTHBRIDGE, Philippe Mathieu-Daudé, 2021/03/24
- [PATCH 1/6] hw/isa/vt82c686: Name output IRQ as 'intr', Philippe Mathieu-Daudé, 2021/03/24
- [PATCH 2/6] hw/isa/vt82c686: Simplify removing unuseful qemu_allocate_irqs() call, Philippe Mathieu-Daudé, 2021/03/24
- [PATCH 3/6] hw/isa/vt82c686: Let ISA function expose ISA IRQs, Philippe Mathieu-Daudé, 2021/03/24
- [PATCH 4/6] hw/ide/via: Replace magic 2 value by ARRAY_SIZE / MAX_IDE_DEVS, Philippe Mathieu-Daudé, 2021/03/24
- [PATCH 5/6] hw/ide/via: Connect IDE function output IRQs to the ISA function input,
Philippe Mathieu-Daudé <=
- [PATCH 6/6] hw/southbridge/vt82c686: Introduce VT82C686B_SOUTHBRIDGE, Philippe Mathieu-Daudé, 2021/03/24
- Re: [PATCH 0/6] hw/southbridge: QOM'ify vt82c686 as VT82C686B_SOUTHBRIDGE, BALATON Zoltan, 2021/03/24