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[RFC v11 24/55] target/arm: move arm_cpu_list to common_cpu
From: |
Claudio Fontana |
Subject: |
[RFC v11 24/55] target/arm: move arm_cpu_list to common_cpu |
Date: |
Tue, 23 Mar 2021 16:46:08 +0100 |
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu-common.c | 42 +++++++++++++++++++++++++++++++++++++++++
target/arm/tcg/helper.c | 41 ----------------------------------------
2 files changed, 42 insertions(+), 41 deletions(-)
diff --git a/target/arm/cpu-common.c b/target/arm/cpu-common.c
index dc7a5049a7..a01280dba8 100644
--- a/target/arm/cpu-common.c
+++ b/target/arm/cpu-common.c
@@ -8,6 +8,7 @@
#include "qemu/osdep.h"
#include "qemu/log.h"
+#include "qemu/qemu-print.h"
#include "qom/object.h"
#include "qapi/qapi-commands-machine-target.h"
#include "qapi/error.h"
@@ -285,3 +286,44 @@ uint64_t arm_sctlr(CPUARMState *env, int el)
}
return env->cp15.sctlr_el[el];
}
+
+/* Sort alphabetically by type name, except for "any". */
+static gint arm_cpu_list_compare(gconstpointer a, gconstpointer b)
+{
+ ObjectClass *class_a = (ObjectClass *)a;
+ ObjectClass *class_b = (ObjectClass *)b;
+ const char *name_a, *name_b;
+
+ name_a = object_class_get_name(class_a);
+ name_b = object_class_get_name(class_b);
+ if (strcmp(name_a, "any-" TYPE_ARM_CPU) == 0) {
+ return 1;
+ } else if (strcmp(name_b, "any-" TYPE_ARM_CPU) == 0) {
+ return -1;
+ } else {
+ return strcmp(name_a, name_b);
+ }
+}
+
+static void arm_cpu_list_entry(gpointer data, gpointer user_data)
+{
+ ObjectClass *oc = data;
+ const char *typename;
+ char *name;
+
+ typename = object_class_get_name(oc);
+ name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_ARM_CPU));
+ qemu_printf(" %s\n", name);
+ g_free(name);
+}
+
+void arm_cpu_list(void)
+{
+ GSList *list;
+
+ list = object_class_get_list(TYPE_ARM_CPU, false);
+ list = g_slist_sort(list, arm_cpu_list_compare);
+ qemu_printf("Available CPUs:\n");
+ g_slist_foreach(list, arm_cpu_list_entry, NULL);
+ g_slist_free(list);
+}
diff --git a/target/arm/tcg/helper.c b/target/arm/tcg/helper.c
index a44b01a712..a93863152a 100644
--- a/target/arm/tcg/helper.c
+++ b/target/arm/tcg/helper.c
@@ -620,47 +620,6 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
}
-/* Sort alphabetically by type name, except for "any". */
-static gint arm_cpu_list_compare(gconstpointer a, gconstpointer b)
-{
- ObjectClass *class_a = (ObjectClass *)a;
- ObjectClass *class_b = (ObjectClass *)b;
- const char *name_a, *name_b;
-
- name_a = object_class_get_name(class_a);
- name_b = object_class_get_name(class_b);
- if (strcmp(name_a, "any-" TYPE_ARM_CPU) == 0) {
- return 1;
- } else if (strcmp(name_b, "any-" TYPE_ARM_CPU) == 0) {
- return -1;
- } else {
- return strcmp(name_a, name_b);
- }
-}
-
-static void arm_cpu_list_entry(gpointer data, gpointer user_data)
-{
- ObjectClass *oc = data;
- const char *typename;
- char *name;
-
- typename = object_class_get_name(oc);
- name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_ARM_CPU));
- qemu_printf(" %s\n", name);
- g_free(name);
-}
-
-void arm_cpu_list(void)
-{
- GSList *list;
-
- list = object_class_get_list(TYPE_ARM_CPU, false);
- list = g_slist_sort(list, arm_cpu_list_compare);
- qemu_printf("Available CPUs:\n");
- g_slist_foreach(list, arm_cpu_list_entry, NULL);
- g_slist_free(list);
-}
-
/* Sign/zero extend */
uint32_t HELPER(sxtb16)(uint32_t x)
{
--
2.26.2
- Re: [RFC v11 13/55] target/arm: split cpregs from tcg/helper.c, (continued)
- [RFC v11 19/55] target/arm: add temporary stub for arm_rebuild_hflags, Claudio Fontana, 2021/03/23
- [RFC v11 20/55] target/arm: split vfp state setting from tcg helpers, Claudio Fontana, 2021/03/23
- [RFC v11 21/55] target/arm: move arm_mmu_idx* to cpu-mmu, Claudio Fontana, 2021/03/23
- [RFC v11 23/55] target/arm: move arm_sctlr away from tcg helpers, Claudio Fontana, 2021/03/23
- [RFC v11 24/55] target/arm: move arm_cpu_list to common_cpu,
Claudio Fontana <=
- [RFC v11 22/55] target/arm: move sve_zcr_len_for_el to common_cpu, Claudio Fontana, 2021/03/23
- [RFC v11 25/55] target/arm: move aarch64_sync_32_to_64 (and vv) to cpu code, Claudio Fontana, 2021/03/23
- [RFC v11 26/55] target/arm: split a15 cpu model and 32bit class functions to cpu32.c, Claudio Fontana, 2021/03/23
- [RFC v11 30/55] target/arm: wrap call to aarch64_sve_change_el in tcg_enabled(), Claudio Fontana, 2021/03/23