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[RFC v10 47/49] target/arm: cpu-pauth: new module for ARMv8.3 Pointer Au
From: |
Claudio Fontana |
Subject: |
[RFC v10 47/49] target/arm: cpu-pauth: new module for ARMv8.3 Pointer Authentication |
Date: |
Mon, 22 Mar 2021 15:02:04 +0100 |
Pointer Authentication is an AARCH64-only ARMv8.3 optional
extension, whose cpu properties can be separated out in its own module.
Signed-off-by: Claudio Fontana <cfontana@suse.de>
---
target/arm/cpu.h | 13 +-------
target/arm/tcg/cpu-pauth.h | 38 ++++++++++++++++++++++
target/arm/cpu.c | 3 +-
target/arm/cpu64.c | 34 +-------------------
target/arm/tcg/cpu-pauth.c | 66 ++++++++++++++++++++++++++++++++++++++
target/arm/tcg/meson.build | 1 +
6 files changed, 108 insertions(+), 47 deletions(-)
create mode 100644 target/arm/tcg/cpu-pauth.h
create mode 100644 target/arm/tcg/cpu-pauth.c
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 662ac5ee62..e9cfb99ad9 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -203,6 +203,7 @@ typedef struct {
#ifdef TARGET_AARCH64
# define ARM_MAX_VQ 16
# include "cpu-sve.h"
+# include "tcg/cpu-pauth.h"
#else
# define ARM_MAX_VQ 1
#endif /* TARGET_AARCH64 */
@@ -211,18 +212,6 @@ typedef struct ARMVectorReg {
uint64_t d[2 * ARM_MAX_VQ] QEMU_ALIGNED(16);
} ARMVectorReg;
-/* ARMv8.3 Pointer Authentication Extension (AARCH64-only) */
-
-#ifdef TARGET_AARCH64
-void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp);
-/* In AArch32 mode, PAC keys do not exist at all. */
-typedef struct ARMPACKey {
- uint64_t lo, hi;
-} ARMPACKey;
-#else
-static inline void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp) { }
-#endif
-
typedef struct CPUARMState {
/* Regs for current mode. */
uint32_t regs[16];
diff --git a/target/arm/tcg/cpu-pauth.h b/target/arm/tcg/cpu-pauth.h
new file mode 100644
index 0000000000..5b130cdada
--- /dev/null
+++ b/target/arm/tcg/cpu-pauth.h
@@ -0,0 +1,38 @@
+/*
+ * QEMU AArch64 Pointer Authentication Extensions
+ *
+ * Copyright (c) 2013 Linaro Ltd
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see
+ * <http://www.gnu.org/licenses/gpl-2.0.html>
+ */
+
+#ifndef CPU_PAUTH_H
+#define CPU_PAUTH_H
+
+/* ARMv8.3 pauth is an AARCH64 option, only include this for TARGET_AARCH64 */
+
+/* called by arm_cpu_finalize_features in realizefn */
+bool cpu_pauth_finalize(ARMCPU *cpu, Error **errp);
+
+/* add the CPU Pointer Authentication properties */
+void cpu_pauth_add_props(Object *obj);
+
+/* Pointer Authentication Code Key */
+
+typedef struct ARMPACKey {
+ uint64_t lo, hi;
+} ARMPACKey;
+
+#endif /* CPU_PAUTH_H */
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 195fe49fbf..82c55b4820 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -832,8 +832,7 @@ void arm_cpu_finalize_features(ARMCPU *cpu, Error **errp)
* is in use, so the user will not be able to set them.
*/
if (tcg_enabled()) {
- arm_cpu_pauth_finalize(cpu, &local_err);
- if (local_err != NULL) {
+ if (!cpu_pauth_finalize(cpu, &local_err)) {
error_propagate(errp, local_err);
return;
}
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 70345fbecb..9bc5ddfc09 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -245,36 +245,6 @@ static void aarch64_a72_initfn(Object *obj)
define_arm_cp_regs(cpu, cortex_a72_a57_a53_cp_reginfo);
}
-void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp)
-{
- int arch_val = 0, impdef_val = 0;
- uint64_t t;
-
- /* TODO: Handle HaveEnhancedPAC, HaveEnhancedPAC2, HaveFPAC. */
- if (cpu->prop_pauth) {
- if (cpu->prop_pauth_impdef) {
- impdef_val = 1;
- } else {
- arch_val = 1;
- }
- } else if (cpu->prop_pauth_impdef) {
- error_setg(errp, "cannot enable pauth-impdef without pauth");
- error_append_hint(errp, "Add pauth=on to the CPU property list.\n");
- }
-
- t = cpu->isar.id_aa64isar1;
- t = FIELD_DP64(t, ID_AA64ISAR1, APA, arch_val);
- t = FIELD_DP64(t, ID_AA64ISAR1, GPA, arch_val);
- t = FIELD_DP64(t, ID_AA64ISAR1, API, impdef_val);
- t = FIELD_DP64(t, ID_AA64ISAR1, GPI, impdef_val);
- cpu->isar.id_aa64isar1 = t;
-}
-
-static Property arm_cpu_pauth_property =
- DEFINE_PROP_BOOL("pauth", ARMCPU, prop_pauth, true);
-static Property arm_cpu_pauth_impdef_property =
- DEFINE_PROP_BOOL("pauth-impdef", ARMCPU, prop_pauth_impdef, false);
-
/* -cpu max: if KVM is enabled, like -cpu host (best possible with this host);
* otherwise, a CPU with as many features enabled as our emulation supports.
* The version of '-cpu max' for qemu-system-arm is defined in cpu.c;
@@ -433,9 +403,7 @@ static void aarch64_max_initfn(Object *obj)
cpu->dcz_blocksize = 7; /* 512 bytes */
#endif
- /* Default to PAUTH on, with the architected algorithm. */
- qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_property);
- qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_impdef_property);
+ cpu_pauth_add_props(obj);
}
cpu_sve_add_props(obj);
diff --git a/target/arm/tcg/cpu-pauth.c b/target/arm/tcg/cpu-pauth.c
new file mode 100644
index 0000000000..4f087923ac
--- /dev/null
+++ b/target/arm/tcg/cpu-pauth.c
@@ -0,0 +1,66 @@
+/*
+ * QEMU AArch64 Pointer Authentication Extensions
+ *
+ * Copyright (c) 2012 SUSE LINUX Products GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see
+ * <http://www.gnu.org/licenses/gpl-2.0.html>
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "cpu.h"
+#include "sysemu/tcg.h"
+#include "tcg/cpu-pauth.h"
+#include "hw/qdev-properties.h"
+
+bool cpu_pauth_finalize(ARMCPU *cpu, Error **errp)
+{
+ bool result = true;
+ int arch_val = 0, impdef_val = 0;
+ uint64_t t;
+
+ /* TODO: Handle HaveEnhancedPAC, HaveEnhancedPAC2, HaveFPAC. */
+ if (cpu->prop_pauth) {
+ if (cpu->prop_pauth_impdef) {
+ impdef_val = 1;
+ } else {
+ arch_val = 1;
+ }
+ } else if (cpu->prop_pauth_impdef) {
+ error_setg(errp, "cannot enable pauth-impdef without pauth");
+ error_append_hint(errp, "Add pauth=on to the CPU property list.\n");
+ result = false;
+ }
+
+ t = cpu->isar.id_aa64isar1;
+ t = FIELD_DP64(t, ID_AA64ISAR1, APA, arch_val);
+ t = FIELD_DP64(t, ID_AA64ISAR1, GPA, arch_val);
+ t = FIELD_DP64(t, ID_AA64ISAR1, API, impdef_val);
+ t = FIELD_DP64(t, ID_AA64ISAR1, GPI, impdef_val);
+ cpu->isar.id_aa64isar1 = t;
+ return result;
+}
+
+static Property arm_cpu_pauth_property =
+ DEFINE_PROP_BOOL("pauth", ARMCPU, prop_pauth, true);
+static Property arm_cpu_pauth_impdef_property =
+ DEFINE_PROP_BOOL("pauth-impdef", ARMCPU, prop_pauth_impdef, false);
+
+void cpu_pauth_add_props(Object *obj)
+{
+ /* Default to PAUTH on, with the architected algorithm. */
+ qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_property);
+ qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_impdef_property);
+}
diff --git a/target/arm/tcg/meson.build b/target/arm/tcg/meson.build
index d22e5efb84..47d80a06f5 100644
--- a/target/arm/tcg/meson.build
+++ b/target/arm/tcg/meson.build
@@ -40,6 +40,7 @@ arm_ss.add(when: ['TARGET_AARCH64', 'CONFIG_TCG'], if_true:
files(
'pauth_helper.c',
'sve_helper.c',
'cpu-sve.c',
+ 'cpu-pauth.c',
))
subdir('user')
--
2.26.2
- [RFC v10 29/49] target/arm: cleanup cpu includes, (continued)
- [RFC v10 29/49] target/arm: cleanup cpu includes, Claudio Fontana, 2021/03/22
- [RFC v10 40/49] target/arm: move TCG gt timer creation code in tcg/, Claudio Fontana, 2021/03/22
- [RFC v10 39/49] target/arm: add tcg cpu accel class, Claudio Fontana, 2021/03/22
- [RFC v10 37/49] target/arm: create kvm cpu accel class, Claudio Fontana, 2021/03/22
- [RFC v10 35/49] tests: do not run qom-test on all machines for ARM KVM-only, Claudio Fontana, 2021/03/22
- [RFC v10 44/49] target/arm: arch_dump: restrict ELFCLASS64 to AArch64, Claudio Fontana, 2021/03/22
- [RFC v10 43/49] target/arm: make is_aa64 and arm_el_is_aa64 a macro for !TARGET_AARCH64, Claudio Fontana, 2021/03/22
- [RFC v10 46/49] target/arm: tcg: restrict ZCR cpregs to TARGET_AARCH64, Claudio Fontana, 2021/03/22
- [RFC v10 47/49] target/arm: cpu-pauth: new module for ARMv8.3 Pointer Authentication,
Claudio Fontana <=
- [RFC v10 41/49] target/arm: cpu-sve: new module, Claudio Fontana, 2021/03/22
- [RFC v10 42/49] target/arm: cpu-sve: split TCG and KVM functionality, Claudio Fontana, 2021/03/22
- [RFC v10 48/49] target/arm: refactor arm_cpu_finalize_features into cpu64, Claudio Fontana, 2021/03/22
- [RFC v10 45/49] target/arm: cpu-exceptions: new module, Claudio Fontana, 2021/03/22
- [RFC v10 49/49] XXX target/arm: experiment refactoring cpu "max", Claudio Fontana, 2021/03/22
- Re: [RFC v10 00/49] arm cleanup experiment for kvm-only build, Alex Bennée, 2021/03/23