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Re: [PATCH v4 12/17] target/ppc: Remove MSR_SA and MSR_AP from hflags
From: |
David Gibson |
Subject: |
Re: [PATCH v4 12/17] target/ppc: Remove MSR_SA and MSR_AP from hflags |
Date: |
Mon, 22 Mar 2021 15:20:54 +1100 |
On Mon, Mar 15, 2021 at 12:46:10PM -0600, Richard Henderson wrote:
> Nothing within the translator -- or anywhere else for that
> matter -- checks MSR_SA or MSR_AP on the 602. This may be
> a mistake. However, for the moment, we need not record these
> bits in hflags.
>
> This allows us to simplify HFLAGS_VSX computation by moving
> it to overlap with MSR_VSX.
This leans into the requirement that certain hflags and msr bits line
up, which makes me nervous. Apart from that
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/ppc/cpu.h | 4 +---
> target/ppc/helper_regs.c | 7 +++----
> 2 files changed, 4 insertions(+), 7 deletions(-)
>
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index 07a4331eec..23ff16c154 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -599,14 +599,12 @@ enum {
> HFLAGS_DR = 4, /* MSR_DR */
> HFLAGS_IR = 5, /* MSR_IR */
> HFLAGS_SPE = 6, /* from MSR_SPE if cpu has SPE; avoid overlap w/ MSR_VR
> */
> - HFLAGS_VSX = 7, /* from MSR_VSX if cpu has VSX; avoid overlap w/ MSR_AP
> */
> HFLAGS_TM = 8, /* computed from MSR_TM */
> HFLAGS_BE = 9, /* MSR_BE -- from elsewhere on embedded ppc */
> HFLAGS_SE = 10, /* MSR_SE -- from elsewhere on embedded ppc */
> HFLAGS_GTSE = 11, /* computed from SPR_LPCR[GTSE] */
> HFLAGS_FP = 13, /* MSR_FP */
> - HFLAGS_SA = 22, /* MSR_SA */
> - HFLAGS_AP = 23, /* MSR_AP */
> + HFLAGS_VSX = 23, /* MSR_VSX if cpu has VSX */
> HFLAGS_VR = 25, /* MSR_VR if cpu has VRE */
> };
>
> diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c
> index 8479789e24..d62921c322 100644
> --- a/target/ppc/helper_regs.c
> +++ b/target/ppc/helper_regs.c
> @@ -95,8 +95,7 @@ void hreg_compute_hflags(CPUPPCState *env)
>
> /* Some bits come straight across from MSR. */
> msr_mask = ((1 << MSR_LE) | (1 << MSR_PR) |
> - (1 << MSR_DR) | (1 << MSR_IR) |
> - (1 << MSR_FP) | (1 << MSR_SA) | (1 << MSR_AP));
> + (1 << MSR_DR) | (1 << MSR_IR) | (1 << MSR_FP));
>
> if (ppc_flags & POWERPC_FLAG_HID0_LE) {
> /*
> @@ -133,8 +132,8 @@ void hreg_compute_hflags(CPUPPCState *env)
> if (ppc_flags & POWERPC_FLAG_VRE) {
> msr_mask |= 1 << MSR_VR;
> }
> - if ((ppc_flags & POWERPC_FLAG_VSX) && (msr & (1 << MSR_VSX))) {
> - hflags |= 1 << HFLAGS_VSX;
> + if (ppc_flags & POWERPC_FLAG_VSX) {
> + msr_mask |= 1 << MSR_VSX;
> }
> if ((ppc_flags & POWERPC_FLAG_TM) && (msr & (1ull << MSR_TM))) {
> hflags |= 1 << HFLAGS_TM;
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- Re: [PATCH v4 07/17] target/ppc: Disconnect hflags from MSR, (continued)
- [PATCH v4 10/17] target/ppc: Create helper_scv, Richard Henderson, 2021/03/15
- [PATCH v4 13/17] target/ppc: Remove env->immu_idx and env->dmmu_idx, Richard Henderson, 2021/03/15
- [PATCH v4 14/17] hw/ppc/pnv_core: Update hflags after setting msr, Richard Henderson, 2021/03/15
- [PATCH v4 11/17] target/ppc: Put LPCR[GTSE] in hflags, Richard Henderson, 2021/03/15
- [PATCH v4 12/17] target/ppc: Remove MSR_SA and MSR_AP from hflags, Richard Henderson, 2021/03/15
- Re: [PATCH v4 12/17] target/ppc: Remove MSR_SA and MSR_AP from hflags,
David Gibson <=
- [PATCH v4 16/17] linux-user/ppc: Fix msr updates for signal handling, Richard Henderson, 2021/03/15
- [PATCH v4 15/17] hw/ppc/spapr_rtas: Update hflags after setting msr, Richard Henderson, 2021/03/15
- [PATCH v4 17/17] target/ppc: Validate hflags with CONFIG_DEBUG_TCG, Richard Henderson, 2021/03/15
- Re: [PATCH v4 00/17] target/ppc: Fix truncation of env->hflags, Cédric Le Goater, 2021/03/16