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Re: [PATCH v5 0/4] target/arm: Add support for FEAT_TLBIOS and FEAT_TLBI
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Subject: |
Re: [PATCH v5 0/4] target/arm: Add support for FEAT_TLBIOS and FEAT_TLBIRANGE |
Date: |
Wed, 17 Mar 2021 16:42:48 -0700 (PDT) |
Patchew URL:
20210317233301.4130-1-rebecca@nuviainc.com/">https://patchew.org/QEMU/20210317233301.4130-1-rebecca@nuviainc.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210317233301.4130-1-rebecca@nuviainc.com
Subject: [PATCH v5 0/4] target/arm: Add support for FEAT_TLBIOS and
FEAT_TLBIRANGE
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
* [new tag] patchew/20210317233301.4130-1-rebecca@nuviainc.com ->
patchew/20210317233301.4130-1-rebecca@nuviainc.com
Switched to a new branch 'test'
39b3c36 target/arm: set ID_AA64ISAR0.TLB to 2 for max AARCH64 CPU type
e3bc253 target/arm: Add support for FEAT_TLBIOS
94e5cc1 target/arm: Add support for FEAT_TLBIRANGE
85f8baf accel/tcg: Add TLB invalidation support for ranges of addresses
=== OUTPUT BEGIN ===
1/4 Checking commit 85f8baff74da (accel/tcg: Add TLB invalidation support for
ranges of addresses)
WARNING: line over 80 characters
#238: FILE: include/exec/exec-all.h:354:
+static inline void
tlb_flush_page_range_bits_by_mmuidx_all_cpus_synced(CPUState *src_cpu,
WARNING: line over 80 characters
#239: FILE: include/exec/exec-all.h:355:
+
target_ulong addr,
ERROR: line over 90 characters
#240: FILE: include/exec/exec-all.h:356:
+
target_ulong length,
WARNING: line over 80 characters
#241: FILE: include/exec/exec-all.h:357:
+
uint16_t idxmap,
WARNING: line over 80 characters
#242: FILE: include/exec/exec-all.h:358:
+
unsigned bits)
total: 1 errors, 4 warnings, 217 lines checked
Patch 1/4 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
2/4 Checking commit 94e5cc1394b4 (target/arm: Add support for FEAT_TLBIRANGE)
3/4 Checking commit e3bc253926cd (target/arm: Add support for FEAT_TLBIOS)
4/4 Checking commit 39b3c36068b4 (target/arm: set ID_AA64ISAR0.TLB to 2 for max
AARCH64 CPU type)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
20210317233301.4130-1-rebecca@nuviainc.com/testing.checkpatch/?type=message">http://patchew.org/logs/20210317233301.4130-1-rebecca@nuviainc.com/testing.checkpatch/?type=message.
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