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[PULL 14/38] tcg/tci: Split out tci_args_rrrrrr
From: |
Richard Henderson |
Subject: |
[PULL 14/38] tcg/tci: Split out tci_args_rrrrrr |
Date: |
Wed, 17 Mar 2021 09:34:20 -0600 |
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/tci.c | 31 ++++++++++++++++++++-----------
1 file changed, 20 insertions(+), 11 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index 53e49ccf8e..91c5f71065 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -260,6 +260,17 @@ static void tci_args_rrrrrc(const uint8_t **tb_ptr, TCGReg
*r0, TCGReg *r1,
*r4 = tci_read_r(tb_ptr);
*c5 = tci_read_b(tb_ptr);
}
+
+static void tci_args_rrrrrr(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1,
+ TCGReg *r2, TCGReg *r3, TCGReg *r4, TCGReg *r5)
+{
+ *r0 = tci_read_r(tb_ptr);
+ *r1 = tci_read_r(tb_ptr);
+ *r2 = tci_read_r(tb_ptr);
+ *r3 = tci_read_r(tb_ptr);
+ *r4 = tci_read_r(tb_ptr);
+ *r5 = tci_read_r(tb_ptr);
+}
#endif
static bool tci_compare32(uint32_t u0, uint32_t u1, TCGCond condition)
@@ -422,7 +433,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState
*env,
uint32_t tmp32;
uint64_t tmp64;
#if TCG_TARGET_REG_BITS == 32
- TCGReg r3, r4;
+ TCGReg r3, r4, r5;
uint64_t T1, T2;
#endif
TCGMemOpIdx oi;
@@ -628,18 +639,16 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState
*env,
break;
#if TCG_TARGET_REG_BITS == 32
case INDEX_op_add2_i32:
- t0 = *tb_ptr++;
- t1 = *tb_ptr++;
- tmp64 = tci_read_r64(regs, &tb_ptr);
- tmp64 += tci_read_r64(regs, &tb_ptr);
- tci_write_reg64(regs, t1, t0, tmp64);
+ tci_args_rrrrrr(&tb_ptr, &r0, &r1, &r2, &r3, &r4, &r5);
+ T1 = tci_uint64(regs[r3], regs[r2]);
+ T2 = tci_uint64(regs[r5], regs[r4]);
+ tci_write_reg64(regs, r1, r0, T1 + T2);
break;
case INDEX_op_sub2_i32:
- t0 = *tb_ptr++;
- t1 = *tb_ptr++;
- tmp64 = tci_read_r64(regs, &tb_ptr);
- tmp64 -= tci_read_r64(regs, &tb_ptr);
- tci_write_reg64(regs, t1, t0, tmp64);
+ tci_args_rrrrrr(&tb_ptr, &r0, &r1, &r2, &r3, &r4, &r5);
+ T1 = tci_uint64(regs[r3], regs[r2]);
+ T2 = tci_uint64(regs[r5], regs[r4]);
+ tci_write_reg64(regs, r1, r0, T1 - T2);
break;
case INDEX_op_brcond2_i32:
tci_args_rrrrcl(&tb_ptr, &r0, &r1, &r2, &r3, &condition, &ptr);
--
2.25.1
- [PULL 02/38] tcg/tci: Rename tci_read_r to tci_read_rval, (continued)
- [PULL 02/38] tcg/tci: Rename tci_read_r to tci_read_rval, Richard Henderson, 2021/03/17
- [PULL 01/38] tcg/tci: Remove ifdefs for TCG_TARGET_HAS_ext32[us]_i64, Richard Henderson, 2021/03/17
- [PULL 03/38] tcg/tci: Split out tci_args_rrs, Richard Henderson, 2021/03/17
- [PULL 11/38] tcg/tci: Reuse tci_args_l for calls., Richard Henderson, 2021/03/17
- [PULL 09/38] tcg/tci: Split out tci_args_rrcl and tci_args_rrrrcl, Richard Henderson, 2021/03/17
- [PULL 07/38] tcg/tci: Split out tci_args_l, Richard Henderson, 2021/03/17
- [PULL 10/38] tcg/tci: Split out tci_args_ri and tci_args_rI, Richard Henderson, 2021/03/17
- [PULL 04/38] tcg/tci: Split out tci_args_rr, Richard Henderson, 2021/03/17
- [PULL 12/38] tcg/tci: Reuse tci_args_l for exit_tb, Richard Henderson, 2021/03/17
- [PULL 08/38] tcg/tci: Split out tci_args_rrrrrc, Richard Henderson, 2021/03/17
- [PULL 14/38] tcg/tci: Split out tci_args_rrrrrr,
Richard Henderson <=
- [PULL 18/38] tcg/tci: Split out tci_args_{rrm,rrrm,rrrrm}, Richard Henderson, 2021/03/17
- [PULL 26/38] tcg/tci: Split out tcg_out_op_rr, Richard Henderson, 2021/03/17
- [PULL 13/38] tcg/tci: Reuse tci_args_l for goto_tb, Richard Henderson, 2021/03/17
- [PULL 20/38] tcg/tci: Remove tci_disas, Richard Henderson, 2021/03/17
- [PULL 19/38] tcg/tci: Hoist op_size checking into tci_args_*, Richard Henderson, 2021/03/17
- [PULL 21/38] tcg/tci: Implement the disassembler properly, Richard Henderson, 2021/03/17
- [PULL 27/38] tcg/tci: Split out tcg_out_op_rrr, Richard Henderson, 2021/03/17
- [PULL 30/38] tcg/tci: Split out tcg_out_op_rrrbb, Richard Henderson, 2021/03/17
- [PULL 28/38] tcg/tci: Split out tcg_out_op_rrrc, Richard Henderson, 2021/03/17
- [PULL 24/38] tcg/tci: Split out tcg_out_op_l, Richard Henderson, 2021/03/17