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[PATCH v2 02/15] target/ppc: Move 601 hflags adjustment to hreg_compute_
From: |
Richard Henderson |
Subject: |
[PATCH v2 02/15] target/ppc: Move 601 hflags adjustment to hreg_compute_hflags |
Date: |
Fri, 12 Mar 2021 19:00:05 -0600 |
Keep all hflags computation in one place, as this will be
especially important later.
Introduce a new POWERPC_FLAG_HID0_LE bit to indicate when
LE should be taken from HID0. This appears to be set if
and only if POWERPC_FLAG_RTC_CLK is set, but we're not
short of bits and having both names will avoid confusion.
Note that this was the only user of hflags_nmsr, so we can
perform a straight assignment rather than mask and set.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/ppc/cpu.h | 2 ++
target/ppc/helper_regs.c | 13 +++++++++++--
target/ppc/misc_helper.c | 8 +++-----
target/ppc/translate_init.c.inc | 4 ++--
4 files changed, 18 insertions(+), 9 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index e73416da68..061d2eed1b 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -581,6 +581,8 @@ enum {
POWERPC_FLAG_TM = 0x00100000,
/* Has SCV (ISA 3.00) */
POWERPC_FLAG_SCV = 0x00200000,
+ /* Has HID0 for LE bit (601) */
+ POWERPC_FLAG_HID0_LE = 0x00400000,
};
/*****************************************************************************/
diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c
index 5e18232b84..95b9aca61f 100644
--- a/target/ppc/helper_regs.c
+++ b/target/ppc/helper_regs.c
@@ -96,8 +96,17 @@ void hreg_compute_hflags(CPUPPCState *env)
hflags_mask |= (1ULL << MSR_CM) | (1ULL << MSR_SF) | MSR_HVB;
hreg_compute_mem_idx(env);
env->hflags = env->msr & hflags_mask;
- /* Merge with hflags coming from other registers */
- env->hflags |= env->hflags_nmsr;
+
+ if (env->flags & POWERPC_FLAG_HID0_LE) {
+ /*
+ * Note that MSR_LE is not set in env->msr_mask for this cpu,
+ * and so will never be set in msr or hflags at this point.
+ */
+ uint32_t le = extract32(env->spr[SPR_HID0], 3, 1);
+ env->hflags |= le << MSR_LE;
+ /* Retain for backward compatibility with migration. */
+ env->hflags_nmsr = le << MSR_LE;
+ }
}
void cpu_interrupt_exittb(CPUState *cs)
diff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c
index 5d6e0de396..63e3147eb4 100644
--- a/target/ppc/misc_helper.c
+++ b/target/ppc/misc_helper.c
@@ -194,16 +194,14 @@ void helper_store_hid0_601(CPUPPCState *env, target_ulong
val)
target_ulong hid0;
hid0 = env->spr[SPR_HID0];
+ env->spr[SPR_HID0] = (uint32_t)val;
+
if ((val ^ hid0) & 0x00000008) {
/* Change current endianness */
- env->hflags &= ~(1 << MSR_LE);
- env->hflags_nmsr &= ~(1 << MSR_LE);
- env->hflags_nmsr |= (1 << MSR_LE) & (((val >> 3) & 1) << MSR_LE);
- env->hflags |= env->hflags_nmsr;
+ hreg_compute_hflags(env);
qemu_log("%s: set endianness to %c => " TARGET_FMT_lx "\n", __func__,
val & 0x8 ? 'l' : 'b', env->hflags);
}
- env->spr[SPR_HID0] = (uint32_t)val;
}
void helper_store_403_pbr(CPUPPCState *env, uint32_t num, target_ulong value)
diff --git a/target/ppc/translate_init.c.inc b/target/ppc/translate_init.c.inc
index c03a7c4f52..049d76cfd1 100644
--- a/target/ppc/translate_init.c.inc
+++ b/target/ppc/translate_init.c.inc
@@ -5441,7 +5441,7 @@ POWERPC_FAMILY(601)(ObjectClass *oc, void *data)
pcc->excp_model = POWERPC_EXCP_601;
pcc->bus_model = PPC_FLAGS_INPUT_6xx;
pcc->bfd_mach = bfd_mach_ppc_601;
- pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_RTC_CLK;
+ pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_RTC_CLK | POWERPC_FLAG_HID0_LE;
}
#define POWERPC_MSRR_601v (0x0000000000001040ULL)
@@ -5485,7 +5485,7 @@ POWERPC_FAMILY(601v)(ObjectClass *oc, void *data)
#endif
pcc->bus_model = PPC_FLAGS_INPUT_6xx;
pcc->bfd_mach = bfd_mach_ppc_601;
- pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_RTC_CLK;
+ pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_RTC_CLK | POWERPC_FLAG_HID0_LE;
}
static void init_proc_602(CPUPPCState *env)
--
2.25.1
- [PATCH v2 00/15] target/ppc: Fix truncation of env->hflags, Richard Henderson, 2021/03/12
- [PATCH v2 01/15] target/ppc: Move helper_regs.h functions out-of-line, Richard Henderson, 2021/03/12
- [PATCH v2 02/15] target/ppc: Move 601 hflags adjustment to hreg_compute_hflags,
Richard Henderson <=
- [PATCH v2 03/15] target/ppc: Properly sync cpu state with new msr in cpu_load_old, Richard Henderson, 2021/03/12
- [PATCH v2 04/15] target/ppc: Do not call hreg_compute_mem_idx after ppc_store_msr, Richard Henderson, 2021/03/12
- [PATCH v2 05/15] target/ppc: Retain hflags_nmsr only for migration, Richard Henderson, 2021/03/12
- [PATCH v2 06/15] target/ppc: Fix comment for MSR_FE{0,1}, Richard Henderson, 2021/03/12
- [PATCH v2 07/15] target/ppc: Disconnect hflags from MSR, Richard Henderson, 2021/03/12
- [PATCH v2 08/15] target/ppc: Reduce env->hflags to uint32_t, Richard Henderson, 2021/03/12
- [PATCH v2 09/15] target/ppc: Put dbcr0 single-step bits into hflags, Richard Henderson, 2021/03/12
- [PATCH v2 10/15] target/ppc: Create helper_scv, Richard Henderson, 2021/03/12
- [PATCH v2 12/15] target/ppc: Remove MSR_SA and MSR_AP from hflags, Richard Henderson, 2021/03/12
- [PATCH v2 14/15] hw/ppc: Use hreg_store_msr for msr updates, Richard Henderson, 2021/03/12