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[PULL 1/9] target/m68k: implement rtr instruction
From: |
Laurent Vivier |
Subject: |
[PULL 1/9] target/m68k: implement rtr instruction |
Date: |
Thu, 11 Mar 2021 22:09:26 +0100 |
This is needed to boot MacOS ROM.
Pull the condition code and the program counter from the stack.
Operation:
(SP) -> CCR
SP + 2 -> SP
(SP) -> PC
SP + 4 -> SP
This operation is not privileged.
Reported-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210307212552.523552-1-laurent@vivier.eu>
---
target/m68k/translate.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index ac936ebe8f14..200018ae6a63 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -2969,6 +2969,25 @@ DISAS_INSN(rtd)
gen_jmp(s, tmp);
}
+DISAS_INSN(rtr)
+{
+ TCGv tmp;
+ TCGv ccr;
+ TCGv sp;
+
+ sp = tcg_temp_new();
+ ccr = gen_load(s, OS_WORD, QREG_SP, 0, IS_USER(s));
+ tcg_gen_addi_i32(sp, QREG_SP, 2);
+ tmp = gen_load(s, OS_LONG, sp, 0, IS_USER(s));
+ tcg_gen_addi_i32(QREG_SP, sp, 4);
+ tcg_temp_free(sp);
+
+ gen_set_sr(s, ccr, true);
+ tcg_temp_free(ccr);
+
+ gen_jmp(s, tmp);
+}
+
DISAS_INSN(rts)
{
TCGv tmp;
@@ -6015,6 +6034,7 @@ void register_m68k_insns (CPUM68KState *env)
BASE(nop, 4e71, ffff);
INSN(rtd, 4e74, ffff, RTD);
BASE(rts, 4e75, ffff);
+ INSN(rtr, 4e77, ffff, M68000);
BASE(jump, 4e80, ffc0);
BASE(jump, 4ec0, ffc0);
INSN(addsubq, 5000, f080, M68000);
--
2.29.2
- [PULL 0/9] M68k for 6.0 patches, Laurent Vivier, 2021/03/11
- [PULL 2/9] target/m68k: don't set SSW ATC bit for physical bus errors, Laurent Vivier, 2021/03/11
- [PULL 1/9] target/m68k: implement rtr instruction,
Laurent Vivier <=
- [PULL 4/9] target/m68k: add M68K_FEATURE_UNALIGNED_DATA feature, Laurent Vivier, 2021/03/11
- [PULL 3/9] target/m68k: reformat m68k_features enum, Laurent Vivier, 2021/03/11
- [PULL 7/9] m68k: add an interrupt controller, Laurent Vivier, 2021/03/11
- [PULL 5/9] char: add goldfish-tty, Laurent Vivier, 2021/03/11
- Re: [PULL 5/9] char: add goldfish-tty, Daniel P . Berrangé, 2021/03/15