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[PATCH v5 10/57] tcg/tci: Split out tci_args_ri and tci_args_rI
From: |
Richard Henderson |
Subject: |
[PATCH v5 10/57] tcg/tci: Split out tci_args_ri and tci_args_rI |
Date: |
Thu, 11 Mar 2021 08:39:11 -0600 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/tci.c | 38 ++++++++++++++++++++++----------------
1 file changed, 22 insertions(+), 16 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index c8df45ce28..cfbe039fa6 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -121,16 +121,6 @@ static int32_t tci_read_s32(const uint8_t **tb_ptr)
return value;
}
-#if TCG_TARGET_REG_BITS == 64
-/* Read constant (64 bit) from bytecode. */
-static uint64_t tci_read_i64(const uint8_t **tb_ptr)
-{
- uint64_t value = *(const uint64_t *)(*tb_ptr);
- *tb_ptr += sizeof(value);
- return value;
-}
-#endif
-
/* Read indexed register (native size) from bytecode. */
static tcg_target_ulong
tci_read_rval(const tcg_target_ulong *regs, const uint8_t **tb_ptr)
@@ -180,6 +170,8 @@ static tcg_target_ulong tci_read_label(const uint8_t
**tb_ptr)
* tci_args_<arguments>
* where arguments is a sequence of
*
+ * i = immediate (uint32_t)
+ * I = immediate (tcg_target_ulong)
* r = register
* s = signed ldst offset
*/
@@ -196,6 +188,22 @@ static void tci_args_rr(const uint8_t **tb_ptr,
*r1 = tci_read_r(tb_ptr);
}
+static void tci_args_ri(const uint8_t **tb_ptr,
+ TCGReg *r0, tcg_target_ulong *i1)
+{
+ *r0 = tci_read_r(tb_ptr);
+ *i1 = tci_read_i32(tb_ptr);
+}
+
+#if TCG_TARGET_REG_BITS == 64
+static void tci_args_rI(const uint8_t **tb_ptr,
+ TCGReg *r0, tcg_target_ulong *i1)
+{
+ *r0 = tci_read_r(tb_ptr);
+ *i1 = tci_read_i(tb_ptr);
+}
+#endif
+
static void tci_args_rrr(const uint8_t **tb_ptr,
TCGReg *r0, TCGReg *r1, TCGReg *r2)
{
@@ -481,9 +489,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState
*env,
regs[r0] = regs[r1];
break;
case INDEX_op_tci_movi_i32:
- t0 = *tb_ptr++;
- t1 = tci_read_i32(&tb_ptr);
- tci_write_reg(regs, t0, t1);
+ tci_args_ri(&tb_ptr, &r0, &t1);
+ regs[r0] = t1;
break;
/* Load/store operations (32 bit). */
@@ -703,9 +710,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState
*env,
#endif
#if TCG_TARGET_REG_BITS == 64
case INDEX_op_tci_movi_i64:
- t0 = *tb_ptr++;
- t1 = tci_read_i64(&tb_ptr);
- tci_write_reg(regs, t0, t1);
+ tci_args_rI(&tb_ptr, &r0, &t1);
+ regs[r0] = t1;
break;
/* Load/store operations (64 bit). */
--
2.25.1
- [PATCH v5 06/57] tcg/tci: Split out tci_args_rrrc, (continued)
- [PATCH v5 06/57] tcg/tci: Split out tci_args_rrrc, Richard Henderson, 2021/03/11
- [PATCH v5 04/57] tcg/tci: Split out tci_args_rr, Richard Henderson, 2021/03/11
- [PATCH v5 07/57] tcg/tci: Split out tci_args_l, Richard Henderson, 2021/03/11
- [PATCH v5 09/57] tcg/tci: Split out tci_args_rrcl and tci_args_rrrrcl, Richard Henderson, 2021/03/11
- [PATCH v5 08/57] tcg/tci: Split out tci_args_rrrrrc, Richard Henderson, 2021/03/11
- [PATCH v5 10/57] tcg/tci: Split out tci_args_ri and tci_args_rI,
Richard Henderson <=
- [PATCH v5 14/57] tcg/tci: Split out tci_args_rrrrrr, Richard Henderson, 2021/03/11
- [PATCH v5 11/57] tcg/tci: Reuse tci_args_l for calls., Richard Henderson, 2021/03/11
- [PATCH v5 15/57] tcg/tci: Split out tci_args_rrrr, Richard Henderson, 2021/03/11
- [PATCH v5 13/57] tcg/tci: Reuse tci_args_l for goto_tb, Richard Henderson, 2021/03/11
- [PATCH v5 12/57] tcg/tci: Reuse tci_args_l for exit_tb, Richard Henderson, 2021/03/11