Re: [PATCH v8 32/35] Hexagon (tests/tcg/hexagon) TCG tests - atomics/load/store/misc

[Richard Henderson]

On 2/7/21 9:46 PM, Taylor Simpson wrote:
> +/* Using volatile because we are testing atomics */
> +static inline int atomic_inc32(volatile int *x)
> +{
> +    int old, dummy;
> +    __asm__ __volatile__(
> +        "1: %0 = memw_locked(%2)\n\t"
> +        "   %1 = add(%0, #1)\n\t"
> +        "   memw_locked(%2, p0) = %1\n\t"
> +        "   if (!p0) jump 1b\n\t"
> +        : "=&r"(old), "=&r"(dummy)
> +        : "r"(x)
> +        : "p0", "memory");
> +    return old;
> +}

While I can hardly deny a cpu testcase using inline asm, I'm a bit curious why
you didn't use the compiler builtins.


r~