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Re: [PATCH v2 02/15] tcg/arm: Add host vector framework
From: |
Richard Henderson |
Subject: |
Re: [PATCH v2 02/15] tcg/arm: Add host vector framework |
Date: |
Mon, 8 Feb 2021 10:58:38 -0800 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 |
On 2/8/21 10:28 AM, Peter Maydell wrote:
> On Mon, 8 Feb 2021 at 17:53, Peter Maydell <peter.maydell@linaro.org> wrote:
>> The AAPCS says that q4-q7 are preserved across calls.
>
> Speaking of which, doesn't that mean we also need to
> save and restore q4-q7 in tcg_target_qemu_prologue()
> if we might be generating neon insns? (It doesn't look like
> aarch64's prologue does this, which seems like a bug.)
I just put them on the reserved list so that they don't get used.
> tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_V8);
...
> tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_V15);
We have way more vector registers than TCG will currently use, and we have to
assume all helpers can modify env->memory, so avoiding the call-saved ones is
best.
r~
[PATCH v2 03/15] tcg/arm: Implement tcg_out_ld/st for vector types, Richard Henderson, 2021/02/07
[PATCH v2 04/15] tcg/arm: Implement tcg_out_mov for vector types, Richard Henderson, 2021/02/07
[PATCH v2 07/15] tcg/arm: Implement andc, orc, abs, neg, not vector operations, Richard Henderson, 2021/02/07
[PATCH v2 05/15] tcg/arm: Implement tcg_out_dup*_vec, Richard Henderson, 2021/02/07