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[PATCH v7 11/35] Hexagon (target/hexagon) register fields
From: |
Taylor Simpson |
Subject: |
[PATCH v7 11/35] Hexagon (target/hexagon) register fields |
Date: |
Tue, 19 Jan 2021 21:28:44 -0600 |
Declare bitfields within registers such as user status register (USR)
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
---
target/hexagon/reg_fields.h | 36 ++++++++++++++++++++++++++++++++++++
target/hexagon/reg_fields_def.h | 41 +++++++++++++++++++++++++++++++++++++++++
target/hexagon/reg_fields.c | 27 +++++++++++++++++++++++++++
3 files changed, 104 insertions(+)
create mode 100644 target/hexagon/reg_fields.h
create mode 100644 target/hexagon/reg_fields_def.h
create mode 100644 target/hexagon/reg_fields.c
diff --git a/target/hexagon/reg_fields.h b/target/hexagon/reg_fields.h
new file mode 100644
index 0000000..34c8010
--- /dev/null
+++ b/target/hexagon/reg_fields.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights
Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef HEXAGON_REG_FIELDS_H
+#define HEXAGON_REG_FIELDS_H
+
+typedef struct {
+ int offset;
+ int width;
+} RegField;
+
+extern const RegField reg_field_info[];
+
+enum {
+#define DEF_REG_FIELD(TAG, START, WIDTH) \
+ TAG,
+#include "reg_fields_def.h"
+ NUM_REG_FIELDS
+#undef DEF_REG_FIELD
+};
+
+#endif
diff --git a/target/hexagon/reg_fields_def.h b/target/hexagon/reg_fields_def.h
new file mode 100644
index 0000000..f2a58d4
--- /dev/null
+++ b/target/hexagon/reg_fields_def.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights
Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+/*
+ * For registers that have individual fields, explain them here
+ * DEF_REG_FIELD(tag,
+ * bit start offset,
+ * width
+ */
+
+/* USR fields */
+DEF_REG_FIELD(USR_OVF, 0, 1)
+DEF_REG_FIELD(USR_FPINVF, 1, 1)
+DEF_REG_FIELD(USR_FPDBZF, 2, 1)
+DEF_REG_FIELD(USR_FPOVFF, 3, 1)
+DEF_REG_FIELD(USR_FPUNFF, 4, 1)
+DEF_REG_FIELD(USR_FPINPF, 5, 1)
+
+DEF_REG_FIELD(USR_LPCFG, 8, 2)
+
+DEF_REG_FIELD(USR_FPRND, 22, 2)
+
+DEF_REG_FIELD(USR_FPINVE, 25, 1)
+DEF_REG_FIELD(USR_FPDBZE, 26, 1)
+DEF_REG_FIELD(USR_FPOVFE, 27, 1)
+DEF_REG_FIELD(USR_FPUNFE, 28, 1)
+DEF_REG_FIELD(USR_FPINPE, 29, 1)
diff --git a/target/hexagon/reg_fields.c b/target/hexagon/reg_fields.c
new file mode 100644
index 0000000..1819b5a
--- /dev/null
+++ b/target/hexagon/reg_fields.c
@@ -0,0 +1,27 @@
+/*
+ * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights
Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "qemu/osdep.h"
+#include "reg_fields.h"
+
+const RegField reg_field_info[] = {
+#define DEF_REG_FIELD(TAG, START, WIDTH) \
+ { START, WIDTH },
+#include "reg_fields_def.h"
+ { 0, 0 }
+#undef DEF_REG_FIELD
+};
--
2.7.4
- RE: [PATCH v7 07/35] Hexagon (target/hexagon) scalar core helpers, (continued)
[PATCH v7 10/35] Hexagon (target/hexagon) instruction and packet types, Taylor Simpson, 2021/01/19
[PATCH v7 24/35] Hexagon (target/hexagon) macros, Taylor Simpson, 2021/01/19
[PATCH v7 09/35] Hexagon (target/hexagon) architecture types, Taylor Simpson, 2021/01/19
[PATCH v7 12/35] Hexagon (target/hexagon) instruction attributes, Taylor Simpson, 2021/01/19
[PATCH v7 11/35] Hexagon (target/hexagon) register fields,
Taylor Simpson <=
[PATCH v7 34/35] Hexagon build infrastructure, Taylor Simpson, 2021/01/19
[PATCH v7 05/35] Hexagon (disas) disassembler, Taylor Simpson, 2021/01/19
[PATCH v7 35/35] Add Dockerfile for hexagon, Taylor Simpson, 2021/01/19
[PATCH v7 08/35] Hexagon (target/hexagon) GDB Stub, Taylor Simpson, 2021/01/19
[PATCH v7 14/35] Hexagon (target/hexagon) instruction printing, Taylor Simpson, 2021/01/19