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Re: [PATCH v2 04/22] tcg/arm: Split out target constraints to tcg-target


From: Peter Maydell
Subject: Re: [PATCH v2 04/22] tcg/arm: Split out target constraints to tcg-target-con-str.h
Date: Tue, 19 Jan 2021 14:42:14 +0000

On Fri, 15 Jan 2021 at 21:11, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  tcg/arm/tcg-target-con-str.h | 22 ++++++++++++
>  tcg/arm/tcg-target.h         |  1 +
>  tcg/arm/tcg-target.c.inc     | 69 +++++++-----------------------------
>  3 files changed, 36 insertions(+), 56 deletions(-)
>  create mode 100644 tcg/arm/tcg-target-con-str.h
>
> diff --git a/tcg/arm/tcg-target-con-str.h b/tcg/arm/tcg-target-con-str.h
> new file mode 100644
> index 0000000000..2451ec6c7f
> --- /dev/null
> +++ b/tcg/arm/tcg-target-con-str.h
> @@ -0,0 +1,22 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Define Arm target-specific operand constraint.

"constraints" (check if you copied-and-pasted this into
other headers).

> + * Copyright (c) 2021 Linaro
> + */
> +

> -    /* qemu_ld address */
> -    case 'l':
> -        ct->regs = 0xffff;
>  #ifdef CONFIG_SOFTMMU
> -        /* r0-r2,lr will be overwritten when reading the tlb entry,
> -           so don't use these. */
> -        tcg_regset_reset_reg(ct->regs, TCG_REG_R0);
> -        tcg_regset_reset_reg(ct->regs, TCG_REG_R1);
> -        tcg_regset_reset_reg(ct->regs, TCG_REG_R2);
> -        tcg_regset_reset_reg(ct->regs, TCG_REG_R3);
> -        tcg_regset_reset_reg(ct->regs, TCG_REG_R14);
> +#define ALL_QLOAD_REGS \
> +    (ALL_GENERAL_REGS & ~((1 << TCG_REG_R0) | (1 << TCG_REG_R1) | \
> +                          (1 << TCG_REG_R2) | (1 << TCG_REG_R3) | \
> +                          (1 << TCG_REG_R14)))
> +#define ALL_QSTORE_REGS \
> +    (ALL_GENERAL_REGS & ~((1 << TCG_REG_R0) | (1 << TCG_REG_R1) | \
> +                          (1 << TCG_REG_R2) | (1 << TCG_REG_R14) | \
> +                          ((TARGET_LONG_BITS == 64) << TCG_REG_R3)))
> +#else
> +#define ALL_QLOAD_REGS   ALL_GENERAL_REGS
> +#define ALL_QSTORE_REGS \
> +    (ALL_GENERAL_REGS & ~((1 << TCG_REG_R0) | (1 << TCG_REG_R1)))
>  #endif
> -        break;
> -
> -    /* qemu_st address & data */
> -    case 's':
> -        ct->regs = 0xffff;
> -        /* r0-r2 will be overwritten when reading the tlb entry (softmmu 
> only)
> -           and r0-r1 doing the byte swapping, so don't use these. */
> -        tcg_regset_reset_reg(ct->regs, TCG_REG_R0);
> -        tcg_regset_reset_reg(ct->regs, TCG_REG_R1);
> -#if defined(CONFIG_SOFTMMU)
> -        /* Avoid clashes with registers being used for helper args */
> -        tcg_regset_reset_reg(ct->regs, TCG_REG_R2);
> -#if TARGET_LONG_BITS == 64
> -        /* Avoid clashes with registers being used for helper args */
> -        tcg_regset_reset_reg(ct->regs, TCG_REG_R3);
> -#endif
> -        tcg_regset_reset_reg(ct->regs, TCG_REG_R14);
> -#endif
> -        break;

Seems a bit of a shame to lose the commentary about why we
need to exclude some of the registers.

Otherwise
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM



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