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[PULL v2 58/69] target/mips: Convert Rel6 Special2 opcode to decodetree
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL v2 58/69] target/mips: Convert Rel6 Special2 opcode to decodetree |
Date: |
Thu, 14 Jan 2021 17:20:12 +0100 |
Special2 opcode have been removed from the Release 6.
Add a single decodetree entry for all the opcode class,
triggering Reserved Instruction if ever used.
Remove unreachable check_insn_opc_removed() call.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201208203704.243704-7-f4bug@amsat.org>
---
target/mips/mips32r6.decode | 2 ++
target/mips/rel6_translate.c | 7 +++++++
target/mips/translate.c | 2 --
3 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/target/mips/mips32r6.decode b/target/mips/mips32r6.decode
index d71a65f32cb..dd7faf75ab8 100644
--- a/target/mips/mips32r6.decode
+++ b/target/mips/mips32r6.decode
@@ -15,3 +15,5 @@
@lsa ...... rs:5 rt:5 rd:5 ... sa:2 ...... &rtype
LSA 000000 ..... ..... ..... 000 .. 000101 @lsa
+
+REMOVED 011100 ----- ----- ----- ----- ------ # SPECIAL2
diff --git a/target/mips/rel6_translate.c b/target/mips/rel6_translate.c
index da70ff9662b..139a7524eea 100644
--- a/target/mips/rel6_translate.c
+++ b/target/mips/rel6_translate.c
@@ -18,6 +18,13 @@
#include "decode-mips32r6.c.inc"
#include "decode-mips64r6.c.inc"
+bool trans_REMOVED(DisasContext *ctx, arg_REMOVED *a)
+{
+ gen_reserved_instruction(ctx);
+
+ return true;
+}
+
static bool trans_LSA(DisasContext *ctx, arg_rtype *a)
{
return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa);
diff --git a/target/mips/translate.c b/target/mips/translate.c
index e3bb1e83efe..2f23ce4a363 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -27136,8 +27136,6 @@ static void decode_opc_special2_legacy(CPUMIPSState
*env, DisasContext *ctx)
int rs, rt, rd;
uint32_t op1;
- check_insn_opc_removed(ctx, ISA_MIPS_R6);
-
rs = (ctx->opcode >> 21) & 0x1f;
rt = (ctx->opcode >> 16) & 0x1f;
rd = (ctx->opcode >> 11) & 0x1f;
--
2.26.2
- [PULL v2 29/69] target/mips/translate: Add declarations for generic code, (continued)
- [PULL v2 29/69] target/mips/translate: Add declarations for generic code, Philippe Mathieu-Daudé, 2021/01/14
- [PULL v2 30/69] target/mips: Replace gen_exception_err(err=0) by gen_exception_end(), Philippe Mathieu-Daudé, 2021/01/14
- [PULL v2 31/69] target/mips: Replace gen_exception_end(EXCP_RI) by gen_rsvd_instruction, Philippe Mathieu-Daudé, 2021/01/14
- [PULL v2 32/69] target/mips: Declare generic FPU / Coprocessor functions in translate.h, Philippe Mathieu-Daudé, 2021/01/14
- [PULL v2 36/69] target/mips/translate: Expose check_mips_64() to 32-bit mode, Philippe Mathieu-Daudé, 2021/01/14
- [PULL v2 35/69] target/mips/translate: Extract decode_opc_legacy() from decode_opc(), Philippe Mathieu-Daudé, 2021/01/14
- [PULL v2 52/69] target/mips: Introduce decode tree bindings for MSA ASE, Philippe Mathieu-Daudé, 2021/01/14
- [PULL v2 53/69] target/mips: Use decode_ase_msa() generated from decodetree, Philippe Mathieu-Daudé, 2021/01/14
- [PULL v2 54/69] target/mips: Extract LSA/DLSA translation generators, Philippe Mathieu-Daudé, 2021/01/14
- [PULL v2 55/69] target/mips: Introduce decodetree helpers for MSA LSA/DLSA opcodes, Philippe Mathieu-Daudé, 2021/01/14
- [PULL v2 58/69] target/mips: Convert Rel6 Special2 opcode to decodetree,
Philippe Mathieu-Daudé <=
- [PULL v2 56/69] target/mips: Introduce decodetree helpers for Release6 LSA/DLSA opcodes, Philippe Mathieu-Daudé, 2021/01/14
- [PULL v2 57/69] target/mips: Remove now unreachable LSA/DLSA opcodes code, Philippe Mathieu-Daudé, 2021/01/14
- [PULL v2 63/69] target/mips: Convert Rel6 LDL/LDR/SDL/SDR opcodes to decodetree, Philippe Mathieu-Daudé, 2021/01/14
- [PULL v2 66/69] target/mips: Remove CPU_R5900 definition, Philippe Mathieu-Daudé, 2021/01/14
- [PULL v2 67/69] target/mips: Remove CPU_NANOMIPS32 definition, Philippe Mathieu-Daudé, 2021/01/14
- [PULL v2 68/69] target/mips: Remove vendor specific CPU definitions, Philippe Mathieu-Daudé, 2021/01/14
- Re: [PULL v2 00/69] MIPS patches for 2021-01-14, Peter Maydell, 2021/01/15