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[PULL 00/21] target-arm queue
From: |
Peter Maydell |
Subject: |
[PULL 00/21] target-arm queue |
Date: |
Tue, 12 Jan 2021 16:57:29 +0000 |
Arm queue; not huge but I figured I might as well send it out since
I've been doing code review today and there's no queue of unprocessed
pullreqs...
thanks
-- PMM
The following changes since commit b3f846c59d8405bb87c551187721fc92ff2f1b92:
Merge remote-tracking branch
'remotes/huth-gitlab/tags/pull-request-2021-01-11v2' into staging (2021-01-11
15:15:35 +0000)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20210112
for you to fetch changes up to 19d131395ccaf503db21dadd8257e6dc9fc1d7de:
ui/cocoa: Fix openFile: deprecation on Big Sur (2021-01-12 11:38:37 +0000)
----------------------------------------------------------------
target-arm queue:
* arm: Support emulation of ARMv8.4-TTST extension
* arm: Update cpu.h ID register field definitions
* arm: Fix breakage of XScale instruction emulation
* hw/net/lan9118: Fix RX Status FIFO PEEK value
* npcm7xx: Add ADC and PWM emulation
* ui/cocoa: Make "open docs" help menu entry work again when binary
is run from the build tree
* ui/cocoa: Fix openFile: deprecation on Big Sur
* docs: Add qemu-storage-daemon(1) manpage to meson.build
* docs: Build and install all the docs in a single manual
----------------------------------------------------------------
Hao Wu (6):
hw/misc: Add clock converter in NPCM7XX CLK module
hw/timer: Refactor NPCM7XX Timer to use CLK clock
hw/adc: Add an ADC module for NPCM7XX
hw/misc: Add a PWM module for NPCM7XX
hw/misc: Add QTest for NPCM7XX PWM Module
hw/*: Use type casting for SysBusDevice in NPCM7XX
Leif Lindholm (6):
target/arm: fix typo in cpu.h ID_AA64PFR1 field name
target/arm: make ARMCPU.clidr 64-bit
target/arm: make ARMCPU.ctr 64-bit
target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h
target/arm: add aarch64 ID register fields to cpu.h
target/arm: add aarch32 ID register fields to cpu.h
Peter Maydell (5):
docs: Add qemu-storage-daemon(1) manpage to meson.build
docs: Build and install all the docs in a single manual
target/arm: Don't decode insns in the XScale/iWMMXt space as cp insns
hw/net/lan9118: Fix RX Status FIFO PEEK value
hw/net/lan9118: Add symbolic constants for register offsets
Roman Bolshakov (2):
ui/cocoa: Update path to docs in build tree
ui/cocoa: Fix openFile: deprecation on Big Sur
RĂ©mi Denis-Courmont (2):
target/arm: ARMv8.4-TTST extension
target/arm: enable Small Translation tables in max CPU
docs/conf.py | 46 ++-
docs/devel/conf.py | 15 -
docs/index.html.in | 17 -
docs/interop/conf.py | 28 --
docs/meson.build | 65 ++--
docs/specs/conf.py | 16 -
docs/system/arm/nuvoton.rst | 4 +-
docs/system/conf.py | 28 --
docs/tools/conf.py | 37 --
docs/user/conf.py | 15 -
meson.build | 1 +
hw/adc/trace.h | 1 +
include/hw/adc/npcm7xx_adc.h | 69 ++++
include/hw/arm/npcm7xx.h | 4 +
include/hw/misc/npcm7xx_clk.h | 146 ++++++-
include/hw/misc/npcm7xx_pwm.h | 105 +++++
include/hw/timer/npcm7xx_timer.h | 1 +
target/arm/cpu.h | 85 ++++-
hw/adc/npcm7xx_adc.c | 301 +++++++++++++++
hw/arm/npcm7xx.c | 55 ++-
hw/arm/npcm7xx_boards.c | 2 +-
hw/mem/npcm7xx_mc.c | 2 +-
hw/misc/npcm7xx_clk.c | 807 ++++++++++++++++++++++++++++++++++++++-
hw/misc/npcm7xx_gcr.c | 2 +-
hw/misc/npcm7xx_pwm.c | 550 ++++++++++++++++++++++++++
hw/misc/npcm7xx_rng.c | 2 +-
hw/net/lan9118.c | 26 +-
hw/nvram/npcm7xx_otp.c | 2 +-
hw/ssi/npcm7xx_fiu.c | 2 +-
hw/timer/npcm7xx_timer.c | 39 +-
target/arm/cpu64.c | 1 +
target/arm/helper.c | 15 +-
target/arm/translate.c | 7 +
tests/qtest/npcm7xx_adc-test.c | 377 ++++++++++++++++++
tests/qtest/npcm7xx_pwm-test.c | 490 ++++++++++++++++++++++++
hw/adc/meson.build | 1 +
hw/adc/trace-events | 5 +
hw/misc/meson.build | 1 +
hw/misc/trace-events | 6 +
tests/qtest/meson.build | 4 +-
ui/cocoa.m | 7 +-
41 files changed, 3124 insertions(+), 263 deletions(-)
delete mode 100644 docs/devel/conf.py
delete mode 100644 docs/index.html.in
delete mode 100644 docs/interop/conf.py
delete mode 100644 docs/specs/conf.py
delete mode 100644 docs/system/conf.py
delete mode 100644 docs/tools/conf.py
delete mode 100644 docs/user/conf.py
create mode 100644 hw/adc/trace.h
create mode 100644 include/hw/adc/npcm7xx_adc.h
create mode 100644 include/hw/misc/npcm7xx_pwm.h
create mode 100644 hw/adc/npcm7xx_adc.c
create mode 100644 hw/misc/npcm7xx_pwm.c
create mode 100644 tests/qtest/npcm7xx_adc-test.c
create mode 100644 tests/qtest/npcm7xx_pwm-test.c
create mode 100644 hw/adc/trace-events
- [PULL 00/21] target-arm queue,
Peter Maydell <=
- [PULL 02/21] target/arm: enable Small Translation tables in max CPU, Peter Maydell, 2021/01/12
- [PULL 01/21] target/arm: ARMv8.4-TTST extension, Peter Maydell, 2021/01/12
- [PULL 03/21] target/arm: fix typo in cpu.h ID_AA64PFR1 field name, Peter Maydell, 2021/01/12
- [PULL 04/21] target/arm: make ARMCPU.clidr 64-bit, Peter Maydell, 2021/01/12
- [PULL 05/21] target/arm: make ARMCPU.ctr 64-bit, Peter Maydell, 2021/01/12
- [PULL 06/21] target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h, Peter Maydell, 2021/01/12
- [PULL 07/21] target/arm: add aarch64 ID register fields to cpu.h, Peter Maydell, 2021/01/12
- [PULL 08/21] target/arm: add aarch32 ID register fields to cpu.h, Peter Maydell, 2021/01/12
- [PULL 10/21] docs: Add qemu-storage-daemon(1) manpage to meson.build, Peter Maydell, 2021/01/12
- [PULL 12/21] target/arm: Don't decode insns in the XScale/iWMMXt space as cp insns, Peter Maydell, 2021/01/12