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Re: [PATCH v3 0/6] target/arm: various changes to cpu.h
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From: |
Peter Maydell |
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Subject: |
Re: [PATCH v3 0/6] target/arm: various changes to cpu.h |
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Date: |
Tue, 12 Jan 2021 10:12:24 +0000 |
On Fri, 8 Jan 2021 at 18:51, Leif Lindholm <leif@nuviainc.com> wrote:
>
> First, fix a typo in ID_AA64PFR1 (SBSS -> SSBS).
>
> Second, turn clidr in the ARMCPU struct 64-bit, to support all fields defined
> by the ARM ARM.
>
> Third, add field definitions for CLIDR (excepting the Ttype<n> fields, since
> I was unsure of prefererred naming - Ttype7-Ttype1?).
>
> Fourth add all ID_AA64 registers/fields present in ARM DDI 0487F.c,
>
> Lastly, add all ID_ (aarch32) registers/fields.
>
> Some of the ID_AA64 fields will be used by some patches Rebecca Cran will be
> submitting shortly, and some of those features also exist for aarch32.
Applied to target-arm.next, thanks.
-- PMM
- [PATCH v3 1/6] target/arm: fix typo in cpu.h ID_AA64PFR1 field name, (continued)
- [PATCH v3 1/6] target/arm: fix typo in cpu.h ID_AA64PFR1 field name, Leif Lindholm, 2021/01/08
- [PATCH v3 2/6] target/arm: make ARMCPU.clidr 64-bit, Leif Lindholm, 2021/01/08
- [PATCH v3 4/6] target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h, Leif Lindholm, 2021/01/08
- [PATCH v3 6/6] target/arm: add aarch32 ID register fields to cpu.h, Leif Lindholm, 2021/01/08
- [PATCH v3 3/6] target/arm: make ARMCPU.ctr 64-bit, Leif Lindholm, 2021/01/08
- [PATCH v3 5/6] target/arm: add aarch64 ID register fields to cpu.h, Leif Lindholm, 2021/01/08
- Re: [PATCH v3 0/6] target/arm: various changes to cpu.h,
Peter Maydell <=