Bug in Bonito? (mips/fuloong2e)

[BALATON Zoltan]

Hello,

While continuing with part two of my vt82c686b clean ups I've tried to 
implement SMBus IO base configuration in the vt82c686b-pm part that I've 
already done for vt8231 for pegasos2 and it should be the same for 686B. 
(In short, writing address to pm config 0x90 sets base address of smbus 
regs and bit 0 of 0xd2 enables/disables it.) This is what the firmware 
does first and it would allow removing hard coded 0xeee1 value and the 
property to set it and then I could reuse the same PM part in VT8231.

I have code to implement this and it works with pegasos2 but fails with 
fuloong2e and pmon. I've debugged it that write to 0xd2 comes out as 0xd0 
after some mapping in bonito:

bonito_spciconf_write: bonito_spciconf_write 0000000000000490 size 4 val eee1

bonito_sbridge_pciaddr: cfgaddr 10490 pciaddr 2c90 busno 0 devno 5 funno 4 
regno 144

pci_cfg_write vt82c686b-pm 05:4 @0x90 <- 0xeee1

via_pm_write addr 0x90 val 0xeee1 len 0x4


bonito_spciconf_write: bonito_spciconf_write 00000000000004d2 size 2 val 1

bonito_sbridge_pciaddr: cfgaddr 104d2 pciaddr 2cd0 busno 0 devno 5 funno 4 
regno 208

pci_cfg_write vt82c686b-pm 05:4 @0xd0 <- 0x1

via_pm_write addr 0xd0 val 0x1 len 0x2

Note the first write to 0x90 is correct but the second ends up at 0xd0 
instead of 0xd2 after bonito_sbridge_pciaddr(). This is somewhere here:

https://git.qemu.org/?p=qemu.git;a=blob;f=hw/pci-host/bonito.c;h=a99eced06574f999f3f1b999576ae09d5f4b06ca;hb=HEAD#l446

Any idea what this is trying to do and how to fix it?

Regards,
BALATON Zoltan