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Re: [PULL 20/20] hw/block/m25p80: Fix Numonyx fast read dummy cycle coun


From: Peter Maydell
Subject: Re: [PULL 20/20] hw/block/m25p80: Fix Numonyx fast read dummy cycle count
Date: Tue, 15 Dec 2020 21:15:47 +0000

On Tue, 15 Dec 2020 at 15:42, Francisco Iglesias
<frasse.iglesias@gmail.com> wrote:
>
> Hello Peter,
>
> On [2020 Dec 15] Tue 15:11:00, Peter Maydell wrote:
> > On Tue, 15 Dec 2020 at 15:06, Bin Meng <bmeng.cn@gmail.com> wrote:
> > > I believe you tested this with Xilinx SPIPS but not some other 
> > > controllers.
> > > Francisco and I had a discussion about dummy cycles implementation
> > > with different SPI controllers @
> > > http://patchwork.ozlabs.org/project/qemu-devel/patch/1606704602-59435-1-git-send-email-bmeng.cn@gmail.com/
> > > I would like to hear your thoughts. I think we should figure out a
> > > solution that fits all types of controllers.
> >
> > I don't have an opinion on the technical question. Do you want me
> > to drop this patch from the pullreq ?
>
> The patch is correct, it hasn't changed anything regarding how dummy cycles 
> are
> modelled in m25p80 (nor this command currently works), it just corrects the
> situtation for when the volatile configuration register contains 0x0 or 0xF 
> (as
> the commit message mentions).

OK. I've applied the pullreq (partly because this is my last working
day of the year and I don't have the time to respin it). We can
always revert/add fixes in January if necessary.

thanks
- PMM



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